Very low phase-noise, low-spurious jitter attenuating frequency generators with support for one or multiple RF clock frequencies. Support of input clock redundancy, mid to high clock fanout and optional synchronization signals, such as used in JESD204B.
Download: RF Timing Family Product Overview (PDF)
Download: 8V19N49x RF Sampling Clocks with Jitter Attenuation Overview (PDF)
| Date Sort ascending | |
|---|---|
| An Insider’s Guide to Finding the Right Timing Device for Your System | Dec 18, 2017 |
| Why Fanout Buffers Make More Sense | Nov 28, 2017 |
| Time for Performance | Oct 11, 2017 |
| Outputs (#) | Inputs (#) | Input Freq (MHz) | JESD204B/C Compliant | Output Freq Range (MHz) | Frequency Plan | Output Skew (ps) | Adjustable Phase | Noise Floor (dBc/Hz) | Phase Noise Supports GSM | Output Type | Synthesis Mode | Input Ref. Divider Resolution (bits) | Feedback Divider Resolution (bits) | Output Divider Resolution (bits) | Supply Voltage (V) | Input Redundancy | Advanced Features | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| FemtoClock® NG Jitter Atten... | 10 | 2 | 0.008 - 307.2 | No | 15.36 - 2949.12 | 2457.6 / Output_Divider, 2500 / Output_Divider, 2949.12 / Output_Divider | 41 | Yes | -161 | Yes | LVDS, LVPECL | Integer | 15 | 15 | 8 | 3.3 | Auto-switch, Holdover, Input Monitor, Manual switch and more... |
Holdover, Input Switching, JESD204B, Phase Delay, Programmable Clock |
| FemtoClock® NG Jitter Atten... | 11 | 2 | 0.008 - 307.2 | No | 15.36 - 2949.12 | 2457.6 / Output_Divider, 2500 / Output_Divider, 2949.12 / Output_Divider | 28 | Yes | -158.7 | Yes | LVDS, LVPECL | Integer | 15 | 15 | 8 | 3.3 | Auto-switch, Holdover, Input Monitor, Manual switch and more... |
Holdover, Input Switching, Phase Delay, Programmable Clock |
| FemtoClock® NG Jitter Atten... | 12 | 2 | 0.008 - 250 | No | 15.625 - 2500 | 2400 / Output_Divider, 2500 / Output_Divider | 70 | Yes | -161 | Yes | LVDS, LVPECL | Fractional, Integer | 15 | 15 | 8 | 3.3 | Auto-switch, Input Monitor, Manual switch | Holdover, Input Switching, Phase Delay |
| FemtoClock® NG Jitter Atten... | 18 | 4 | 30.72 - 500 | Yes | 20.48 - 1474.56 | 2949.12 / Output_Divider | 37 | Yes | -161 | Yes | LVDS, LVPECL | Integer | 12 | 12 | 8 | 3.3 | Auto-switch, Holdover, Input Monitor, Manual switch and more... |
Holdover, Input Switching, JESD204B, Phase Delay, Programmable Clock |
| FemtoClock® NG Jitter Atten... | 18 | 4 | 1.92 - 2000 | Yes | 18.432 - 2949.12 | 2949.12 / Output_Divider | 100 | Yes | -160 | Yes | LVDS, LVPECL | Integer | 12 | 12 | 8 | 3.3 | Auto-switch, Holdover, Input Monitor, Manual switch and more... |
Holdover, Input Switching, JESD204B, Phase Delay, Programmable Clock |
| FemtoClock® NG Jitter Atten... | 18 | 4 | 1.92 - 2000 | Yes | 12.288 - 1966.08 | 1966.08 / Output_Divider | 100 | Yes | -160 | Yes | LVDS, LVPECL | Integer | 12 | 12 | 8 | 3.3 | Auto-switch, Holdover, Input Monitor, Manual switch and more... |
Holdover, Input Switching, JESD204B, Phase Delay, Programmable Clock |
| FemtoClock® NG Jitter Atten... | 18 | 4 | 1.92 - 2000 | Yes | 15.36 - 2457.6 | 2457.6 / Output_Divider | 100 | Yes | -160 | Yes | LVDS, LVPECL | Integer | 12 | 12 | 8 | 3.3 | Auto-switch, Holdover, Input Monitor, Manual switch and more... |
Holdover, Input Switching, JESD204B, Phase Delay, Programmable Clock |
| FemtoClock® NG Jitter Atten... | 18 | 4 | 1.92 - 2000 | Yes | 18.432 - 2949.12 | 2949.12 / Output_Divider | 100 | Yes | -160 | Yes | LVDS, LVPECL | Integer | 12 | 12 | 8 | 3.3 | Auto-switch, Holdover, Input Monitor, Manual switch and more... |
Holdover, Input Switching, JESD204B, Phase Delay, Programmable Clock |
| FemtoClock® NG Jitter Atten... | 15 | 2 | 1.92 - 2000 | Yes | 12.288 - 2457.6 | 2457.6 / Output_Divider | 100 | Yes | -160 | Yes | LVDS, LVPECL | Integer | 12 | 12 | 8 | 3.3 | Auto-switch, Holdover, Input Monitor, Manual switch and more... |
Holdover, Input Switching, JESD204B, Phase Delay, Programmable Clock |
| FemtoClock® NG Jitter Atten... | 18 | 4 | 30.72 - 2000 | Yes | 18.432 - 3686.4 | 3686.4 / Output_Divider | 100 | Yes | -160 | Yes | LVDS, LVPECL | Integer | 12 | 12 | 8 | 3.3 | Holdover, Input Switching, JESD204B, Phase Delay, Programmable Clock | Holdover, Input Switching, JESD204B, Phase Delay, Programmable Clock |
| FemtoClock® NG Jitter Atten... | 15 | 2 | 1.92 - 2000 | Yes | 18.432 - 2949.12 | 2949.12 / Output_Divider | 0 | Yes | -160 | Yes | LVDS, LVPECL | Integer | 12 | 12 | 8 | 3.3 | Auto-switch, Holdover, Input Monitor, Manual switch and more... |
Holdover, Input Switching, JESD204B, Phase Delay, Programmable Clock |
| FemtoClock® NG Jitter Atten... | 15 | 2 | 30.72 - 2000 | Yes | 19.6608 - 3932.16 | 3932.16 / Output_Divider | 100 | Yes | -160.2 | Yes | LVDS, LVPECL | Integer | 12 | 12 | 8 | 3.3 | Auto-switch, Holdover, Input Monitor, Manual switch and more... |
Holdover, Input Switching, JESD204B, Phase Delay, Programmable Clock |
| RF Sampling Clock Generator ... | 18 | 4 | 0.00375 - 2000 | Yes | 0.192 - 6000 | 3932.16 / Output_Divider | 100 | Yes | -160 | Yes | LVDS, LVPECL | Integer | 12 | 12 | 8 | 3.3 | Auto-switch, Holdover, Input Monitor, Manual switch and more... |
External VCO, Holdover, Input Switching, JESD204B, JESD204C and more... |
