The Tsi721 converts from PCIe to RapidIO and vice versa and provides full line rate bridging at 20 Gbaud. Using the Tsi721 designers can develop heterogeneous systems that leverage the peer to peer networking performance of RapidIO while at the same time using multiprocessor clusters that may only be PCIe enabled. Using the Tsi721, applications that require large amounts of data transferred efficiently without processor involvement can be executed using the full line rate block DMA+Messaging engines of the Tsi721.

Learn more: IDT RapidIO Development Systems


  • x4 PCIe V2.1 to x4 S-RIO V2.1
  • Single port: x4, x2 or x1 support
  • 1.25, 2.5, 3.125 and 5 Gbaud support
  • Multiple DMA and Messaging channels/engines each capable of supporting full 20 Gbaud I/O
  • 8Kbyte packet buffering per DMA and Messaging Channel
  • 20 Baud line rate performance for 64 byte or larger packets, max TLP payload 256 bytes, max block DMA 64 Mbyte
  • PCI Express non-transparent bridging for transaction mapping
  • Lane reversal
  • Automatic Polarity inversion for PCI Express
  • Typical power 2W
  • Reach Support: 60 cm over 2 connectors
  • 100, 125, 156.25 MHz S-RIO and PCIe Endpoint compatible clocking options
  • JTAG 1149.1 and 1149.6
  • 13x13 mm FCBGA
  • Industrial and Commercial options

Product Options

Orderable Part ID Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Package Buy Sample
TSI721A1-16GCLV Active FCBGA 143 C Yes Tray Package Info
TSI721A1-16GILH Active FCBGA 143 I No Tray Package Info
TSI721A1-16GILV Active FCBGA 143 I Yes Tray Package Info

Documentation & Downloads

Title Other Languages Type Format File Size Date
Datasheets & Errata
Tsi721 Datasheet Datasheet PDF 525 KB
Tsi721 Device Errata Errata PDF 102 KB
User Guides & Manuals
PCIe2 to S-RIO2 Bridging and Switching Evaluation Platform Quick Start Guide Guide PDF 233 KB
PCIe2 to S-RIO2 Bridging and Switching Evaluation Platform Manual Manual - Eval Board PDF 1.33 MB
Tsi721 User Manual Manual PDF 4.54 MB
PCN# : A1706-01 Change in Bumping Location on Select Packages Product Change Notice PDF 32 KB
Tsi721 IBIS Model - 3.3V Model - IBIS IBS 298 KB
Tsi721 RapidFET 3_2_003 Module Software Tool ZIP 419 KB
Tsi721 IBIS Model - 2.5V Model - IBIS IBS 290 KB
Tsi721 BSDL Model Model - BSDL BSDL 22 KB
Tsi721 Thermal Compact Model (Flotherm) FCBGA Detailed Model - Thermal ZIP 9 KB
Tsi721 Thermal Compact Model (Flotherm) FCBGA 2R Model - Thermal ZIP 1 KB
Supercomputing at the Mobile Edge Overview Overview PDF 991 KB
IDT Products for Radio Applications 日本語 Product Brief PDF 2.34 MB
S-RIO Switch Feature Comparison Chart Product Brief PDF 50 KB
PCIe2 to S-RIO2 Bridging and Switching Evaluation Platform Schematic Schematic PDF 1.18 MB
S-RIO Linux Support Miscellaneous PDF 12 KB
Tsi721 Product Brief Product Brief PDF 941 KB
Tsi721 Header File Miscellaneous H 221 KB
RapidIO2 Switch Overview Portfolio Overview PDF 4.03 MB
Tsi721 Pinlist and Ballmap Pinlist-Ballmap ZIP 127 KB

Boards & Kits

Part Number Title Type Company
TSI721-16GEBI PCIe2 to S-RIO2 Evaluation Board