The ICS670-02 is a high speed, low phase noise, Zero Delay Buffer (ZDB) which integrates IDT’s proprietary analog/digital Phase Locked Loop (PLL) techniques. Part of IDT’s ClockBlocksTM family, the part’s zero delay feature means that the rising edge of the input clock aligns with the rising edges of the outputs giving the appearance of no delay through the device. There are two identical outputs on the chip. The FBCLK should be used to connect to the FBIN. Each output has its own output enable pin. The ICS670-02 is ideal for synchronizing outputs in a large variety of systems, from personal computers to data
communications to video. By allowing off-chip feedback paths, the chip can eliminate the delay through other devices. The 15 different on-chip multipliers work in a variety of applications. For other multipliers, including functional multipliers, see the ICS527.

特長

  • Packaged in 16-pin SOIC
  • Pb (lead) free package, RoHS compliant
  • Clock inputs from 5 to 160 MHz (see page 2)
  • Patented PLL with low phase noise
  • Output clocks up to 160 MHz at 3.3 V
  • 15 selectable on-chip multipliers
  • Power down mode available
  • Low phase noise: -111 dBc/Hz at 10 kHz
  • Output enable function tri-states outputs
  • Low jitter 15 ps one sigma
  • Advanced, low power, sub-micron CMOS process
  • Operating voltage of 3.3 V or 5 V
  • Industrial temperature range available (-40 to +85°C)

製品選択

発注型名 Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type 購入/サンプル
Obsolete SOIC 16 C はい Tube
Availability
Obsolete SOIC 16 C はい Reel
Availability
Not Recommended for New Designs SOIC 16 I はい Tube
Availability
Not Recommended for New Designs SOIC 16 I はい Reel
Availability

ドキュメント&ダウンロード

タイトル 他の言語 分類 形式 サイズ 日付
データシート
670-02 Datasheet データシート PDF 234 KB
アプリケーションノート、ホワイトペーパー
AN-828 Termination - LVPECL アプリケーションノート PDF 322 KB
AN-844 Termination - AC Coupling Clock Receivers アプリケーションノート PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection アプリケーションノート PDF 495 KB
AN-840 Jitter Specifications for Timing Signals アプリケーションノート PDF 442 KB
AN-834 Hot-Swap Recommendations アプリケーションノート PDF 153 KB
AN-827 Application Relevance of Clock Jitter アプリケーションノート PDF 1.15 MB
AN-815 Understanding Jitter Units アプリケーションノート PDF 565 KB
AN-805 Recommended Ferrite Beads アプリケーションノート PDF 121 KB
System Applications and Design Guidelines with IDT’s Zero-Delay Buffers アプリケーションノート PDF 294 KB
PCN / PDN
PDN# : CQ-18-03 Product Discontinuance Notice 製品中止通知 PDF 218 KB
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly 製品変更通知 PDF 611 KB
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly 製品変更通知 PDF 611 KB
PCN# : A1309-01 Changed of Traceability Mark Format 製品変更通知 PDF 439 KB
PCN# : A1208-01R1 Gold to Copper Wire 製品変更通知 PDF 254 KB
PCN# A-0607-06 MMT Thailand as Alternate Assembly Facility for PLCC, SOIC 150mil/300mil 製品変更通知 PDF 223 KB
Downloads
670-02 3.3V IBIS Model モデル-IBIS ZIP 3 KB
670-01 5.0V IBIS Model モデル-IBIS ZIP 3 KB
670-01 3.3V IBIS Model モデル-IBIS ZIP 3 KB
その他資料
Timing Solutions Products Overview 概要 PDF 4.11 MB
IDT Clock Generation Overview (Japanese) English 概要 PDF 2.19 MB
IDT Clock Distribution Overview (Japanese) English 概要 PDF 7.79 MB