The 8SLVP1204I is a high-performance differential LVPECL fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The 8SLVP1204I is characterized to operate from a 3.3V or 2.5V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the 8SLVP1204I ideal for those clock distribution applications demanding well-defined performance and repeatability. Two selectable differential inputs and four low skew outputs are available. The integrated bias voltage reference enables easy interfacing of single-ended signals to the device inputs. The device is optimized for low power consumption and low additive phase noise.

Features

  • Four low skew, low additive jitter LVPECL output pairs
  • Two selectable, differential clock input pairs
  • Differential pairs can accept the following differential input levels: LVDS, LVPECL, CML
  • Maximum input clock frequency: 2GHz
  • LVCMOS interface levels for the control input (input select)
  • Output skew: 5ps (typical)
  • Propagation delay: 320ps (maximum)
  • Low additive phase jitter, RMS
  • fREF = 156.25MHz, VPP = 1V, 12kHz - 20MHz: 40fs (maximum)
  • Maximum device current consumption (IEE): 60mA (maximum)
  • Full 3.3V or 2.5V supply voltage
  • Available in lead-free (RoHS 6), 16-Lead VFQFN package
  • -40°C to 85°C ambient operating temperature
  • Supports case temperature ≤105°C operations

Product Options

下单器件 ID Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type 封装 Buy Sample
8SLVP1204ANLGI Active VFQFPN 16 I Yes Tube Package Info
Availability
8SLVP1204ANLGI/W Active VFQFPN 16 I 1 Reel Package Info
Availability
8SLVP1204ANLGI8 Active VFQFPN 16 I Yes Reel Package Info
Availability

Documentation & Downloads

文档标题 他の言語 Type 文档格式 文件大小
数据手册与勘误表
8SLVP1204 Datasheet Datasheet PDF 901 KB
应用指南 &白皮书
AN-828 Termination - LVPECL Application Note PDF 322 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-834 Hot-Swap Recommendations Application Note PDF 153 KB
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 180 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 120 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
PCN / PDN
PCN# : TB1912-02 Convert Shipping Media
from Tube or Tray to Cut Reel
Product Change Notice PDF 5.61 MB
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility Product Change Notice PDF 983 KB
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB
Downloads
8SLVP1204I IBIS Model Model - IBIS ZIP 67 KB
其它
RF Timing Family Product Overview Overview PDF 464 KB
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Products for Radio Applications 日本語 Product Brief PDF 2.34 MB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB