The 8S89831I is a high speed 1-to-4 Differential-to-LVPECL/ECL Fanout Buffer. The 8S89831I is optimized for high speed and very low output skew, making it suitable for use in demanding applications such as SONET, 1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The internally terminated differential input and VREF_AC pin allow other differential signal families such as LVDS, LVHSTL and CML to be easily interfaced to the input with minimal use of external components. The device also has an output enable pin which may be useful for system test and debug purposes. The 8S89831I is packaged in a small 3mm x 3mm 16-pin VFQFN package which makes it ideal for use in space-constrained applications.

特性

  • Four LVPECL/ECL outputs
  • IN, nIN input can accept the following differential input levels: LVPECL, LVDS, CML, SSTL
  • 50Ω internal input termination to VT
  • Output frequency: >2.1GHz
  • Output skew: 30ps (maximum)
  • Part-to-part skew: 185ps (maximum)
  • Additive phase jitter, RMS: 0.31ps (typical)
  • Propagation Delay: 570ps (maximum)
  • LVPECL mode operating voltage supply range: VCC = 2.5V±5%, 3.3V±5%, VEE = 0V
  • ECL mode operating voltage supply range: VCC = 0V, VEE = -3.3V±5%, -2.5V±5%
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package

产品选择

下单器件 ID Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Active VFQFPN 16 I 是的 Tube
Availability
Active VFQFPN 16 I 是的 Reel
Availability

文档和下载

文档标题 其他语言 类型 文档格式 文件大小 日期
数据手册与勘误表
8S89831I Datasheet 数据手册 PDF 550 KB
应用指南 &白皮书
AN-828 Termination - LVPECL 应用文档 PDF 322 KB
AN-844 Termination - AC Coupling Clock Receivers 应用文档 PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-834 Hot-Swap Recommendations 应用文档 PDF 153 KB
AN-833 Differential Input Self Oscillation Prevention 应用文档 PDF 180 KB
AN-836 Differential Input to Accept Single-ended Levels 应用文档 PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced 应用文档 PDF 160 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
PCN / PDN
PCN# : TB1912-02(R1) Convert Shipping Media
from Tube or Tray to Cut Reel
产品变更通告 PDF 5.71 MB
PCN# : TB1912-02 Convert Shipping Media
from Tube or Tray to Cut Reel
产品变更通告 PDF 5.61 MB
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility 产品变更通告 PDF 983 KB
PCN# : A1807-01 Gold wire to Copper Wire 产品变更通告 PDF 32 KB
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location 产品变更通告 PDF 596 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location 产品变更通告 PDF 544 KB
Downloads
ICS8s89831I IBIS Model 模型 - IBIS ZIP 76 KB
其他
Timing Solutions Products Overview 概览 PDF 4.11 MB
IDT Products for Radio Applications 日本語 产品简述 PDF 2.34 MB
IDT Clock Generation Overview 日本語 概览 PDF 1.83 MB
IDT Clock Distribution Overview 日本語 概览 PDF 3.79 MB
IDT Fanout Buffers Product Overview 产品简述 PDF 739 KB
High-Performance, Low-Phase Noise Clocks Buffers product brief 产品简述 PDF 378 KB