This is the evaluation board for the IDT 5P49V6965 VersaClock 6E programmable clock generator. With RMS phase jitter of less than 0.5ps over the full 12kHz to 20MHz integration range, the device meets the stringent jitter requirements of PCI Express® Gen 1/2/3, USB 3.0, and 1G/10G Ethernet.  
 

特性

  • 4 differential outputs capable of generating any output frequency using  IDT Timing Commander™ software
  • SMA connectors for outputs
  • When the board is connected to a PC running IDT Timing Commander Software through USB, the device can be configured and programmed to generate frequencies with best-in-class performance
  • The 25MHz crystal installed on the board can source a reference frequency to the device when CLKIN/CLKINB is not used.

产品选择

下单器件 ID Output Signaling Part Status 封装 Buy Sample
5P49V6965-EVK HCSL, LVCMOS, LVDS, LVPECL Active Package Info
Availability

文档和下载

文档标题 其他语言 类型 文档格式 文件大小 日期
使用指南与说明
VersaClock 6E Family Register Descriptions and Programming Guide Manual - User Reference PDF 872 KB
VersaClock 6E - 5P49V60, 5P49V6965 and 5P49V6975 Evaluation Board User Guide Manual - Eval Board PDF 676 KB