4-output Differential Buffer For PCI Express®

The 9DB401C is a DB400 Version 2.0 Yellow Cover part with PCI Express® support. It can be used in PC or embedded systems to provide outputs that have low cycle-to-cycle jitter (50 ps), low output-to-output skew (100 ps), and are PCI Express® gen 1 compliant. The 9DB401C supports a 1 to 4 output configuration, taking a spread or non spread differential HCSL input from a CK410(B) main clock such as 954101 and 932S401, or any other differential HCSL pair. 9DB401C can generate HCSL or LVDS outputs from 50 to 200 MHz in PLL mode or 0 to 400 MHz in bypass mode. There are two de-jittering modes available selectable through the HIGH_BW# input pin, high bandwidth mode provides de-jittering for spread inputs and low bandwidth mode provides extra de-jittering for non-spread inputs. The SRC_STOP#, PD#, and OE real-time input pins provide completely programmable power management control.

Features

  • 4 - 0.7 V HCSL or LVDS differential output pairs
  • Supports zero delay buffer mode and fanout mode
  • Bandwidth programming available
  • Spread spectrum modulation tolerant, 0 to -0.5% down spread and +/- 0.25% center spread
  • Supports undriven differential outputs in PD# and SRC_STOP# modes for power management.
  • Outputs cycle-cycle jitter: < 50 ps
  • Outputs skew: < 50 ps
  • Extended frequency range in bypass mode: Revision B: up to 333.33 MHz Revision C: up to 400 MHz
  • Real-time PLL lock detect output pin
  • 28-pin SSOP/TSSOP package
  • Available in RoHS compliant packaging

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
9DB401CFLF Active PYG28 SSOP 28 C Yes Tube Availability
9DB401CFLFT Active PYG28 SSOP 28 C Yes Reel Availability
9DB401CGLF Active PGG28 TSSOP 28 C Yes Tube Availability
9DB401CGLFT Active PGG28 TSSOP 28 C Yes Reel Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
9DB401C Datasheet Datasheet PDF 160 KB Aug 26, 2012
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 23, 2014
AN-843 PCI Express Reference Clock Requirements Application Note PDF 1.81 MB May 12, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 11, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 7, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 23, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 14, 2014
Other
The IDT Consumer Products Advantage Overview PDF 4.01 MB Jun 30, 2017
The IDT Automotive Advantage Overview PDF 3.55 MB May 26, 2017
The IDT Communications Products Advantage Overview PDF 2.54 MB Feb 13, 2017
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 24, 2016