The 9DBL0651 device is a 3.3V member of IDT's Full-Featured PCIe family. The 9DBL0651 supports PCIe Gen1-4 Common Clocked (CC) and  PCIe Separate Reference Independent Spread (SRIS) systems. It offers an integrated output termination providing direct connection to 85Ω transmission lines. The 9DBL06P1 can be factory programmed with a user-defined power up default SMBus configuration.

For information regarding evaluation boards and material, please contact your local IDT sales representative.

Features

  • PCIe Gen1-2-3-4 CC compliant in ZDB mode
  • PCIe Gen2 SRIS compliant in ZDB mode
  • Supports PCIe Gen2-3 SRIS in fan-out mode
  • Supports PCIe SRnS clocking in ZDB or fan-out mode
  • Direct connection to 85Ω transmission lines; saves 24 resistors compared to standard PCIe devices
  • Spread Spectrum tolerant; allows reduction of EMI
  • Pin/SMBus selectable selectable PLL bandwidth and PLL Bypass; minimize phase jitter for each application
  • Device contains default configuration; SMBus interface not required for device operation.
  • Easy AC-coupling to other logic families, see IDT application note AN-891.
  • Space saving 40-pin 5x5mm VFQFPN; minimal board space

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Output Impedance Carrier Type Buy Sample
9DBL0651BKILF Active NDG40P2 VFQFPN 40 I 85 Tray
Availability
9DBL0651BKILFT Active NDG40P2 VFQFPN 40 I 85 Reel
Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
9DBL0641_51 Datasheet Datasheet PDF 301 KB
User Guides & Manuals
Timing Products for NXP (Freescale) i.MX 简体中文 Guide PDF 321 KB
Application Notes & White Papers
AN-975 Cascading PLLs Application Note PDF 128 KB
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT's "Universal" Low-Power HCSL Outputs Application Note PDF 354 KB
AN-879 Low-Power HCSL vs Traditional HCSL Application Note PDF 150 KB
AN-843 PCI Express Reference Clock Requirements Application Note PDF 1.81 MB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-839 RMS Phase Jitter Application Note PDF 149 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 52 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
Other
9DBL06xx Reference Schematic Schematic PDF 118 KB
Timing Solutions Products Overview Overview PDF 4.11 MB
PCI Express® Timing Solutions Overview Overview PDF 301 KB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB

Software & Tools

Title Other Languages Type Format File Size Date
9DBL0641 IBIS Model Model - IBIS ZIP 89 KB
9DBL06P1 IBIS Model Model - IBIS ZIP 118 KB