The 9DBL411 is a 4-Output lower power differential buffer. Each output has its own OE# pin. It has a maximum operating frequency of 150 MHz.

Features

  • 4 - low power differential output pairs
  • Individual OE# control of each output pair
  • Output cycle-cycle jitter < 25 ps additive
  • Output to output skew: < 50 ps
  • Low power differential fanout buffer for PCIExpress and CPU clocks
  • 20-pin MLF or TSSOP packaging

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
9DBL411AGLF Active PGG20 TSSOP 20 C Yes Tube
Availability
9DBL411AGLFT Active PGG20 TSSOP 20 C Yes Reel
Availability
9DBL411AKLF Active NLG20P1 VFQFPN 20 C Yes Tube
Availability
9DBL411AKLFT Active NLG20P1 VFQFPN 20 C Yes Reel
Availability
9DBL411BGILF Active PGG20 TSSOP 20 I Yes Tube
Availability
9DBL411BGILFT Active PGG20 TSSOP 20 I Yes Reel
Availability
9DBL411BGLF Active PGG20 TSSOP 20 C Yes Tube
Availability
9DBL411BGLFT Active PGG20 TSSOP 20 C Yes Reel
Availability
9DBL411BKILF Active NLG20P1 VFQFPN 20 I Yes Tube
Availability
9DBL411BKILFT Active NLG20P1 VFQFPN 20 I Yes Reel
Availability
9DBL411BKLF Active NLG20P1 VFQFPN 20 C Yes Tube
Availability
9DBL411BKLFT Active NLG20P1 VFQFPN 20 C Yes Reel
Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
9DBL411B Datasheet Datasheet PDF 84 KB
9DBL411A Datasheet Datasheet PDF 79 KB
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT's "Universal" Low-Power HCSL Outputs Application Note PDF 354 KB
AN-879 Low-Power HCSL vs Traditional HCSL Application Note PDF 150 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-843 PCI Express Reference Clock Requirements Application Note PDF 1.81 MB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
PCNs & PDNs
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 95 KB
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 50 KB
PCN# : A1305-01 Gold Wire to Copper Wire Product Change Notice PDF 148 KB
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB
Other
Timing Solutions Products Overview Overview PDF 4.11 MB
PCI Express® Timing Solutions Overview Overview PDF 301 KB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB

Software & Tools

Title Other Languages Type Format File Size Date
9DBL411B IBIS Model Model - IBIS ZIP 7 KB
9DBL411A IBIS Model - IBIS ZIP 7 KB