The 9DBV0931 is a member of IDT's Full-Featured PCIe family. The device has 9 output enables for clock management, and 3 selectable SMBus addresses.

Features

  • LP-HCSL outputs; save 18 resistors and 31mm² compared to standard HCSL
  • 53mW typical power consumption; eliminates thermal concerns
  • Outputs can optionally be supplied from any voltage between 1.05 V and 1.8 V; maximum power savings
  • OE# pins; support DIF power management
  • HCSL-compatible differential input; can be driven by common clock sources
  • SMBus-selectable features allow optimization to customer requirements
    • Slew rate for each output; allows tuning for various line lengths
    • Differential output amplitude; allows tuning for various application environments
  • 1 MHz to 200 MHz operating frequency
  • 3.3 V tolerant SMBus interface works with legacy controllers
  • Selectable SMBus addresses; multiple devices can easily share an SMBus segment
  • Device contains default configuration; SMBus interface not required for device operation
  • Space-saving 6x6 mm 48-pin VFQFPN; minimal board space

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
9DBV0931AKILF Active NDG48P1 VFQFPN 48 I Yes Tray
Availability

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9DBV0931AKILFT Active NDG48P1 VFQFPN 48 I Yes Reel
Availability
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9DBV0931AKLF Active NDG48P1 VFQFPN 48 C Yes Tray
Availability

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9DBV0931AKLFT Active NDG48P1 VFQFPN 48 C Yes Reel
Availability
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Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
9DBV0931 Datasheet – Datasheet PDF 248 KB
Application Notes & White Papers
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT's "Universal" Low-Power HCSL Outputs – Application Note PDF 354 KB
AN-879 Low-Power HCSL vs Traditional HCSL – Application Note PDF 150 KB
AN-844 Termination - AC Coupling Clock Receivers – Application Note PDF 82 KB
AN-843 PCI Express Reference Clock Requirements – Application Note PDF 1.81 MB
AN-842 Thermal Considerations in Package Design and Selection – Application Note PDF 403 KB
AN-840 Jitter Specifications for Timing Signals – Application Note PDF 349 KB
AN-827 Application Relevance of Clock Jitter – Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units – Application Note PDF 476 KB
AN-805 Recommended Ferrite Beads – Application Note PDF 38 KB
PCNs & PDNs
PCN# : A1611-02 Add JCET China as Alternate Assembly and Change of Material Set at Alternate Assembly Location – Product Change Notice PDF 583 KB
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages – Product Change Notice PDF 95 KB
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages – Product Change Notice PDF 50 KB
PCN# : TB1311-01 New Carrier Tape on VFQFPN-28, VFQFPN-40, VFQFPN-48 – Product Change Notice PDF 790 KB
Other
Timing Solutions Products Overview – Overview PDF 4.11 MB
PCI Express® Timing Solutions Overview – Overview PDF 301 KB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB
IDT Fanout Buffers Product Overview – Product Brief PDF 739 KB
High-Performance, Low-Phase Noise Clocks Buffers product brief – Product Brief PDF 378 KB

Software & Tools

Title Other Languages Type Format File Size Date
9DBV0931 IBIS Model – Model - IBIS ZIP 66 KB
info: For device-specific or order-specific documentation, submit a support request.

News & Additional Resources

Date
Comparing and Contrasting PCIe and Ethernet Clock Jitter Specifications May 21, 2018
IDT Extends Leadership in Datacenter and Networking Systems with Launch of Its Latest PCI Express Timing Devices Apr 30, 2018
An Insider’s Guide to Finding the Right Timing Device for Your System Dec 18, 2017
Why Fanout Buffers Make More Sense Nov 28, 2017
Time for Performance Oct 11, 2017
IDT Surpasses Milestone of 3 Million Low-Power PCIe Gen3 Buffers Shipped Dec 18, 2014
IDT Announces World’s Lowest-power PCI Express Timing Family Aug 16, 2012