The IDT5V41234 is a PCIe Gen2/3 compliant spread spectrum capable clock generator. The device has 1 differential HCSL output and can be used in communication or embedded systems to subtantially reduce electro-magnetic interference (EMI). Spread spectrum can be enabled via a select pin.

Features

  • 1 - 0.7V current mode differential HCSL output pairs
  • 16-pin VFQFPN package; very small board footprint 
  • Spread-spectrum capable; reduces EMI 
  • Outputs can be terminated to LVDS; can drive a wider variety of devices
  • Spread enable via pin selection; no software required to configure device
  • Industrial temperature range available; supportsdemanding embedded applications
  • Cycle-to-cycle jitter <100 ps 
  • PCIe Gen2 phase jitter <3.0ps RMS
  • PCIe Gen3 phase jitter <1.0ps RMS

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
5V41234NLG Active NLG16P2 VFQFPN 16 C Yes Tube
Availability

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5V41234NLG8 Active NLG16P2 VFQFPN 16 C Yes Reel
Availability
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5V41234NLGI Active NLG16P2 VFQFPN 16 I Yes Tube
Availability

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5V41234NLGI8 Active NLG16P2 VFQFPN 16 I Yes Reel
Availability
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Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
5V41234 Datasheet – Datasheet PDF 175 KB
Application Notes & White Papers
AN-828 Termination - LVPECL – Application Note PDF 229 KB
AN-844 Termination - AC Coupling Clock Receivers – Application Note PDF 82 KB
AN-843 PCI Express Reference Clock Requirements – Application Note PDF 1.81 MB
AN-842 Thermal Considerations in Package Design and Selection – Application Note PDF 403 KB
AN-835 Differential Input with VCMR being VIH Referenced – Application Note PDF 77 KB
AN-840 Jitter Specifications for Timing Signals – Application Note PDF 349 KB
AN-839 RMS Phase Jitter – Application Note PDF 149 KB
AN-838 Peak-to-Peak Jitter Calculations – Application Note PDF 32 KB
AN-836 Differential Input to Accept Single-ended Levels – Application Note PDF 37 KB
AN-827 Application Relevance of Clock Jitter – Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units – Application Note PDF 476 KB
AN-802 Crystal-Measuring Oscillator Negative Resistance – Application Note PDF 52 KB
AN-805 Recommended Ferrite Beads – Application Note PDF 38 KB
AN-808 PCI Express/HCSL Termination – Application Note PDF 54 KB
PCNs & PDNs
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location – Product Change Notice PDF 596 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location – Product Change Notice PDF 544 KB
Other
Timing Solutions Products Overview – Overview PDF 4.11 MB
PCI Express® Timing Solutions Overview – Overview PDF 301 KB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB

Software & Tools

Title Other Languages Type Format File Size Date
5V41234 IBIS Model – Model - IBIS ZIP 4 KB
info: For device-specific or order-specific documentation, submit a support request.

News & Additional Resources

Date
Comparing and Contrasting PCIe and Ethernet Clock Jitter Specifications May 21, 2018
IDT Extends Leadership in Datacenter and Networking Systems with Launch of Its Latest PCI Express Timing Devices Apr 30, 2018
An Insider’s Guide to Finding the Right Timing Device for Your System Dec 18, 2017
Why Fanout Buffers Make More Sense Nov 28, 2017
Time for Performance Oct 11, 2017