The IDT6P41302 is an 8-output very low power clock generator for PCIe Gen1-2-3 applications with integrated output terminations providing Zo=100. The device has 8 output enables for clock management and supports 2 different spread spectrum levels in addition to spread off.

Features

  • 1.8V operation; reduced power consuption
  • 8 - 0.7V low-power HCSL-compatible (LP-HCSL) DIF pairs w/Zo=100ohm
  • 1 - 1.8V LVCMOS REF output w/Wake-On-LAN (WOL) support
  • DIF cycle-to-cycle jitter <50ps 
  • DIF output-to-output skew <50ps 
  • DIF phase jitter is PCIe Gen1-2-3 compliant 
  • REF phase jitter is < 1.5ps RMS
  • Outputs can optionally be supplied from any voltage between 1.05 and 1.8V; maximum power savings
  • OE# pins; support DIF power management
  • LP-HCSL differential clock outputs; reduced power and board space
  • Programmable Slew rate for each output; allows tuning for various line lengths
  • Programmable output amplitude; allows tuning for various application environments
  • Selectable 0%, -0.25% or -0.5% spread on DIF outputs; reduces EMI
  • External 25MHz crystal; supports tight ppm with 0 ppm synthesis error
  • 3.3V tolerant SMBus interface works with legacy controllers
  • Space saving 48-pin 6x6 mm VFQFPN; minimal board space

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
6P41302NDGI Obsolete NDG48P1 VFQFPN 48 I Yes Tray
Availability
6P41302NDGI8 Obsolete NDG48P1 VFQFPN 48 I Yes Reel
Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
IDT6P41302_freescale Datasheet Datasheet PDF 285 KB
IDT6P41302_freescale Datasheet Datasheet PDF 214 KB
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT's "Universal" Low-Power HCSL Outputs Application Note PDF 354 KB
AN-831 The Crystal Load curve Application Note PDF 308 KB
AN-845 Termination - LVCMOS Application Note PDF 62 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-843 PCI Express Reference Clock Requirements Application Note PDF 1.81 MB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-803 Crystal Timing Budget and Accuracy for IDT Timing Clock Products Application Note PDF 44 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-839 RMS Phase Jitter Application Note PDF 149 KB
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 32 KB
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB
AN-837 Overdriving the Crystal Interface Application Note PDF 50 KB
AN-832 Timing Budget and Accuracy Application Note PDF 48 KB
AN-830 Quartz Crystal Drive Level Application Note PDF 59 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 52 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
AN-801 Crystal-High Drive Level Application Note PDF 109 KB
AN-806 Power Supply Noise Rejection Application Note PDF 353 KB
AN-808 PCI Express/HCSL Termination Application Note PDF 54 KB
PCNs & PDNs
PDN# : CQ-15-01 (R1) Quarter PDN for Declined Market Product Discontinuation Notice PDF 550 KB
PDN# : CQ-15-01 Quarter PDN for Declined Market Product Discontinuation Notice PDF 547 KB
PCN# : TB1311-01 New Carrier Tape on VFQFPN-28, VFQFPN-40, VFQFPN-48 Product Change Notice PDF 790 KB
Other
Timing Solutions Products Overview Overview PDF 4.11 MB
PCI Express® Timing Solutions Overview Overview PDF 301 KB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB