2-output 3.3 V PCIe Clock Generator

The 9FGL02 devices are 3.3V members of IDT's 3.3V Full-Featured PCIe family.   The devices have 2 output enables for clock management and support 2 different spread spectrum levels in addition to spread off. The 9FGL02 supports PCIe Gen1-4 Common Clocked architectures (CC) and PCIe Separate Reference no-Spread (SRnS)  and Separate Reference Independent Spread (SRIS) clocking architectures. The 9FGL02P1 can be programmed with a user-defined power up default SMBus configuration.

Features

  • PCIe Gen1-2-3-4 CC-compliant
  • PCIe Gen2-3 SRIS-compliant
  • Supports PCIe SRnS clocking
  • Direct connection to 100Ω (xx41) or 85Ω (xx51) transmission lines; saves 8 resistors compared to standard PCIe devices
  • Pin/SMBus selectable 0%, -0.25% or -0.5% spread on DIF outputs; minimize EMI and phase jitter for each application
  • 1 - 3.3V LVCMOS REF output w/Wake-On-LAN (WOL) support
  • Easy AC-coupling to other logic families, see IDT application note AN-891.
  • Space saving 24-pin 4x4mm VFQFPN; minimal board space​

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Output Impedance Carrier Type Buy Sample
9FGL0241BKILF Active NLG24P1 VFQFPN 24 I 100 Tray Availability
9FGL0241BKILFT Active NLG24P1 VFQFPN 24 I 100 Reel Availability
9FGL0251BKILF Active NLG24P1 VFQFPN 24 I 85 Tray Availability
9FGL0251BKILFT Active NLG24P1 VFQFPN 24 I 85 Reel Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
9FGL02 Datasheet – Datasheet PDF 364 KB Nov 30, 2016
User Guides & Manuals
Timing Products for Freescale i.MX 简体中文 Guide PDF 390 KB Jan 11, 2016
Application Notes & White Papers
AN-975 Cascading PLLs – Application Note PDF 128 KB Aug 2, 2017
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT's "Universal" Low-Power HCSL Outputs – Application Note PDF 354 KB Dec 10, 2015
AN-879 Low-Power HCSL vs Traditional HCSL – Application Note PDF 150 KB Apr 7, 2015
AN-843 PCI Express Reference Clock Requirements – Application Note PDF 1.81 MB May 12, 2014
AN-842 Thermal Considerations in Package Design and Selection – Application Note PDF 403 KB May 11, 2014
AN-835 Differential Input with VCMR being VIH Referenced – Application Note PDF 77 KB May 10, 2014
AN-840 Jitter Specifications for Timing Signals – Application Note PDF 349 KB May 7, 2014
AN-839 RMS Phase Jitter – Application Note PDF 149 KB May 6, 2014
AN-836 Differential Input to Accept Single-ended Levels – Application Note PDF 37 KB May 5, 2014
AN-827 Application Relevance of Clock Jitter – Application Note PDF 1.06 MB Apr 23, 2014
AN-815 Understanding Jitter Units – Application Note PDF 476 KB Apr 23, 2014
AN-802 Crystal-Measuring Oscillator Negative Resistance – Application Note PDF 52 KB Mar 11, 2014
AN-805 Recommended Ferrite Beads – Application Note PDF 38 KB Jan 14, 2014
PCNs & PDNs
PCN# : A1611-02 Add JCET China as Alternate Assembly and Change of Material Set at Alternate Assembly Location – Product Change Notice PDF 583 KB Dec 19, 2016
PCN# : MM1610-01 Improve performance to meet the new PCIe – Product Change Notice PDF 23 KB Oct 10, 2016
Other
PCI Express® Timing Solutions Overview – Overview PDF 301 KB Apr 19, 2018
The IDT Communications Products Advantage – Overview PDF 4.00 MB Mar 21, 2018
9FGL02 EVB Schematic – Schematic PDF 31 KB May 31, 2017
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 24, 2016

Software & Tools

Title Other Languages Type Format File Size Date
9FGL0241 IBIS Model – Model - IBIS ZIP 89 KB Oct 30, 2016
9FGL02P1 IBIS Model – Model - IBIS ZIP 188 KB Oct 30, 2016

News & Additional Resources

Date
An Insider’s Guide to Finding the Right Timing Device for Your System Dec 18, 2017
Why Fanout Buffers Make More Sense Nov 28, 2017
Time for Performance Oct 11, 2017