The 9FGL04 devices are 3.3V members of IDT's 3.3V Full-Featured PCIe family. The devices have 4 output enables for clock management and support 2 different spread spectrum levels in addition to spread off. The 9FGL04 supports PCIe Gen1-4 Common Clocked architectures (CC) and PCIe Separate Reference no-Spread (SRnS) and Separate Reference Independent Spread (SRIS) clocking architectures. The 9FGL04P1 can be programmed with a user-defined power up default SMBus configuration.
- PCIe Gen1-2-3-4 CC-compliant
- PCIe Gen2-3 SRIS-compliant
- Supports PCIe SRnS clocking
- Direct connection to 100Ω (xx41) or 85Ω (xx51) transmission lines; saves 16 resistors compared to standard PCIe devices
- Pin/SMBus selectable 0%, -0.25% or -0.5% spread on DIF outputs; minimize EMI and phase jitter for each application
- 1 - 3.3V LVCMOS REF output w/Wake-On-LAN (WOL) support
- Easy AC-coupling to other logic families, see IDT application note AN-891.
- Space saving 32-pin 5x5mm VFQFPN; minimal board space