The 9ZML1232E is a second generation 2-input/12-output differential mux for Intel Purley and newer platforms. It exceeds the demanding DB1200ZL performance specifications and is backwards compatible to the 9ZML1232B. It utilizes Low Power HCSL-compatible outputs to reduce power consumption and termination resistors. It is suitable for PCI-Express Gen1-4 or QPI/UPI applications, and provides 2 configurable low-drift I2O settings, one for each input channel, to allow I2O tuning for various topologies.

Features

  • 2 configurable low-drift I2O delays up to 2.9ns; maintain transport delay for various topologies
  • LP-HCSL outputs; eliminate 24 resistors
  • 9 selectable SMBus addresses; multiple devices can share same SMBus segment
  • Separate VDDIO for outputs; allows maximum power savings
  • PLL or Bypass Mode; PLL can dejitter incoming clock
  • Hardware or software-selectable PLL BW; minimizes jitter peaking in downstream PLLs
  • Spread spectrum compatible; tracks spreading input clock for EMI reduction
  • SMBus interface; software can modify device settings without hardware changes
  • 10 x 10 mm 72-QFN package; small board footprint

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
9ZML1232EKILF Active NLG72P1 VFQFPN 72 I Yes Tray
Availability
9ZML1232EKILFT Active NLG72P1 VFQFPN 72 I Yes Reel
Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
9ZML1232E_1252E Datasheet Datasheet PDF 307 KB
Application Notes & White Papers
AN-1001 Combining PhiClock™ and 9ZXL1951D for PCIe Gen4/5 Application Note PDF 103 KB
AN-975 Cascading PLLs Application Note PDF 128 KB
AN-828 Termination - LVPECL Application Note PDF 229 KB
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT's "Universal" Low-Power HCSL Outputs Application Note PDF 354 KB
AN-879 Low-Power HCSL vs Traditional HCSL Application Note PDF 150 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
AN-808 PCI Express/HCSL Termination Application Note PDF 54 KB
PCNs & PDNs
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility Product Change Notice PDF 983 KB
Other
Timing Solutions Products Overview Overview PDF 4.11 MB
PCI Express® Timing Solutions Overview Overview PDF 301 KB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB

Software & Tools

Title Other Languages Type Format File Size Date
9ZML1232E IBIS Model Model - IBIS ZIP 22 KB

Evaluation Boards

Part Number Title Sort ascending
EVK9ZXL1951D Evaluation Kit for 19-Output DB1900Z for PCIe Gen1-4 and QPI/UPI