NOTICE - The following device(s) are recommended alternatives:
The 9ZXL0651 is a low-power 6-output differential buffer that meets all the performance requirements of the Intel DB1200Z specification. It consumes 50% less power than standard HCSL devices and has internal terminations to allow direct connection to 85 ohm transmission lines. It is suitable for PCI-Express Gen1/2/3 or QPI/UPI applications, and uses a fixed external feedback to maintain low drift for demanding QPI/UPI applications.

Features

  • Low-Power-HCSL outputs w/Zo = 85Ω; save power and board space - no termination resistors required. Ideal for blade servers.
  • Space-saving 40-pin VFQFPN package
  • Fixed feedback path for 0ps input-to-output delay
  • 6 OE# pins; Hardware control of each output
  • PLL or bypass mode; PLL can dejitter incoming clock
  • Selectable PLL bandwidth; minimizes jitter peaking in downstream PLL's
  • Spread Spectrum Compatible; tracks spreading input clock for low EMI
  • Cycle-to-cycle jitter <50ps
  • Output-to-output skew <65 ps
  • Input-to-output delay variation <50ps
  • PCIe Gen3 phase jitter <1.0ps RMS
  • QPI/UPI 9.6GT/s 12UI phase jitter <0.2ps RMS

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
9ZXL0651AKLF Active NDG40P2 VFQFPN 40 C Yes Tray
Availability
9ZXL0651AKLFT Active NDG40P2 VFQFPN 40 C Yes Reel
Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
9ZXL0651 Datasheet Datasheet PDF 218 KB
Application Notes & White Papers
AN-975 Cascading PLLs Application Note PDF 128 KB
AN-828 Termination - LVPECL Application Note PDF 229 KB
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT's "Universal" Low-Power HCSL Outputs Application Note PDF 354 KB
AN-879 Low-Power HCSL vs Traditional HCSL Application Note PDF 150 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
AN-808 PCI Express/HCSL Termination Application Note PDF 54 KB
PCNs & PDNs
PCN# : A1403-03 Gold wire to Copper wire Product Change Notice PDF 42 KB
PCN# : TB1311-01 New Carrier Tape on VFQFPN-28, VFQFPN-40, VFQFPN-48 Product Change Notice PDF 790 KB
Other
Timing Solutions Products Overview Overview PDF 4.11 MB
PCI Express® Timing Solutions Overview Overview PDF 301 KB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB

Software & Tools

Title Other Languages Type Format File Size Date
9ZXL0651 IBIS Model Model - IBIS ZIP 34 KB