The 9ZXL0851E is a second-generation enhanced performance DB800ZL differential buffer. The part is a pin-compatible upgrade to the 9ZXL0851A, while offering a much improved phase jitter performance. A fixed external feedback maintains low drift for critical QPI/UPI applications.
 

Features

  • LP-HCSL outputs with 85Ω Zout; eliminate 32 resistors, save 64mm² of area
  • 8 OE# pins; hardware control of each output
  • Selectable PLL BW; minimizes jitter peaking in cascaded PLL topologies
  • Hardware/SMBus control of PLL bandwidth and bypass; change mode without power cycle
  • Spread spectrum compatible; tracks spreading input clock for EMI reduction
  • 100MHz and 133.33MHz PLL mode; UPI and legacy QPI support
  • 6 × 6 mm 48-VFQFPN package; small board footprint

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Range Pkg. Dimensions (mm) Carrier Type Buy Sample
9ZXL0851EKILF Active NDG48P2 VFQFPN 48 -40 to 85°C 6.0 x 6.0 x 0.9 Tray
Availability
9ZXL0851EKILFT Active NDG48P2 VFQFPN 48 -40 to 85°C 6.0 x 6.0 x 0.9 Reel
Availability
9ZXL0851EKKLF Active NDG48P2 VFQFPN 48 -40 to 105°C 6.0 x 6.0 x 0.9 Tray
Availability
9ZXL0851EKKLFT Active NDG48P2 VFQFPN 48 -40 to 105°C 6.0 x 6.0 x 0.9 Reel
Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
9ZXL0831E_0851E Datasheet Datasheet PDF 266 KB
Application Notes & White Papers
AN-1001 Combining PhiClock™ and 9ZXL1951D for PCIe Gen4/5 Application Note PDF 103 KB
AN-975 Cascading PLLs Application Note PDF 128 KB
AN-828 Termination - LVPECL Application Note PDF 229 KB
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT's "Universal" Low-Power HCSL Outputs Application Note PDF 354 KB
AN-879 Low-Power HCSL vs Traditional HCSL Application Note PDF 150 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
AN-808 PCI Express/HCSL Termination Application Note PDF 54 KB
PCNs & PDNs
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility Product Change Notice PDF 983 KB
Other
Timing Solutions Products Overview Overview PDF 4.11 MB
PCI Express® Timing Solutions Overview Overview PDF 301 KB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB

Software & Tools

Title Other Languages Type Format File Size Date
9ZXL0851E IBIS Model Model - IBIS ZIP 19 KB

Evaluation Boards

Part Number Title Sort ascending
EVK9ZXL1951D Evaluation Kit for 19-Output DB1900Z for PCIe Gen1-4 and QPI/UPI