19-Output DB1900ZL Low-Power Derivative

The 9ZXL1951D is a second-generation, enhanced performance DB1900ZL derivative buffer. The part is a pin-compatible upgrade to the 9ZXL1951A, offering a much improved phase jitter performance. It has 8 OE# pins that can be configured via SMBus to control up to 16 of the device's 19 outputs, and is packaged in a 6 x 6 mm QFN package for maximum space savings. A fixed external feedback maintains low drift for critical QPI/UPI applications.

Features

  • LP-HCSL outputs with 85Ω Zout; eliminates 76 termination resistors, saves 130mm² area
  • 8 OE# pins configurable to control up to 16 outputs; easy power management
  • 9 selectable SMBus addresses; multiple devices can share same SMBus segment
  • Selectable PLL BW; minimizes jitter peaking in cascaded PLL topologies
  • Hardware/SMBus control of PLL bandwidth and bypass; change mode without power cycle
  • Spread spectrum compatible; tracks spreading input clock for EMI reduction
  • 100MHz PLL mode; UPI support
  • DIF input and DIF outputs on outer row of pins; easy board routing
  • 6 x 6 mm dual-row 80-GQFN; smallest 19-output Z-buffer

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
9ZXL1951DNHGI Active NHG80 VFQFPN 80 I Yes Tray Availability
9ZXL1951DNHGI8 Active NHG80 VFQFPN 80 I Yes Reel Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
9ZXL1951D Datasheet Datasheet PDF 379 KB Jul 3, 2018
Application Notes & White Papers
AN-1001 Combining PhiClock™ and 9ZXL1951D for PCIe Gen4/5 Application Note PDF 103 KB Mar 12, 2018
AN-975 Cascading PLLs Application Note PDF 128 KB Aug 2, 2017
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT's "Universal" Low-Power HCSL Outputs Application Note PDF 354 KB Dec 10, 2015
AN-879 Low-Power HCSL vs Traditional HCSL Application Note PDF 150 KB Apr 7, 2015
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 12, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 11, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 7, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 5, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 23, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 23, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 14, 2014
AN-808 PCI Express/HCSL Termination Application Note PDF 54 KB Jan 14, 2014
Other
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 24, 2016

Software & Tools

Title Other Languages Type Format File Size Date
9ZXL1951D IBIS Model Model - IBIS ZIP 25 KB Jan 11, 2018

Evaluation Boards

Part Number Title Sort ascending
EVK9ZXL1951D Evaluation Kit for 19-Output DB1900Z for PCIe Gen1-4 and QPI/UPI