The 551S is a low cost, high-speed single input to four output LVCMOS clock buffer. The 551S has best in class Additive Phase Jitter of sub 50 fsec.

Features

  • Low additive phase jitter RMS: 50 fs
  • Extremely low skew outputs (50 ps)
  • Low cost clock buffer
  • Packaged in 8-pin SOIC and 8-pin DFN, Pb-free
  • Input / Output clock frequency up to 200 MHz
  • Non-inverting output clock
  • Ideal for networking clocks
  • Operating Voltages: 1.8 V to 3.3 V
  • Output Enable mode tri-states outputs
  • Advanced, low power CMOS process
  • Extended temperature range (-40°C to +105°C)

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
551SCMGI Active CMG8 COL 8 I Yes Cut Tape
Availability
551SCMGI8 Active CMG8 COL 8 I Yes Reel
Availability
551SDCGI Active DCG8 SOIC 8 I Yes Tube
Availability
551SDCGI8 Active DCG8 SOIC 8 I Yes Reel
Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
551S Datasheet Datasheet PDF 159 KB
Application Notes & White Papers
AN-845 Termination - LVCMOS Application Note PDF 62 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
PCNs & PDNs
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
Other
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB

Software & Tools

Title Other Languages Type Format File Size Date
551S IBIS Model Model - IBIS ZIP 27 KB