The 5V2305S is a low skew, single input to five output, clock buffer. The 5V2305S has best in class additive phase jitter of sub 50 fsec.

The 5V2305S also supports a synchronous glitch-free Output Enable function to eliminate any potential intermediate incorrect output clock cycles when enabling or disabling outputs. Available in 16-pin TSSOP and 10-pin DFN packages and can operate from a 1.8 V to 3.3 V supply.


  • Extremely low RMS Additive Phase Jitter: 50 fs
  • Low output skew: 50 ps
  • Packaged in 16-pin TSSOP and small 2mm x 2mm 10-pin DFN
  • Low power CMOS technology
  • Operating voltages of 1.8 V to 3.3 V
  • Extended temperature range (-40°C to +105°C)

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
5V2305SPGGK Preview PGG16 TSSOP 16 K Yes Tube
5V2305SPGGK8 Preview PGG16 TSSOP 16 K Yes Reel
5V2305SNTGK Preview NTG10 DFN 10 K Yes Cut Tape
5V2305SNTGK8 Preview NTG10 DFN 10 K Yes Reel

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
5V2305S Datasheet Datasheet PDF 122 KB Jul 31, 2016
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-845 Termination - LVCMOS Application Note PDF 62 KB May 12, 2014
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 12, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 11, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 7, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 5, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 23, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 23, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 14, 2014
IDT Clock Buffers Offers Ultra Low Additive Phase Jitter Application Note PDF 1 KB Oct 19, 2008
Timing Solutions Products Overview Overview PDF 4.11 MB Oct 31, 2018
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 24, 2016
IDT Fanout Buffers Product Overview Product Brief PDF 739 KB Feb 16, 2015
High-Performance, Low-Phase Noise Clocks Buffers product brief Product Brief PDF 378 KB Aug 13, 2012

Software & Tools

Title Other Languages Type Format File Size Date
5V2305 IBIS Model Model - IBIS ZIP 31 KB Mar 2, 2004
5V2305 Hspice Model Model - HSPICE ZIP 33 KB Mar 2, 2004