The 853S013I is a low skew, high performance dual 1-to-3 Differential-to-2.5V, 3.3V LVPECL/ ECL Fanout Buffer. The 853S013I operates with a positive or negative power supply at 2.5V or 3.3V. Guaranteed output and part-to-part skew characteristics make the 853S013I ideal for those clock distribution applications demanding well defined performance and repeatability.

Features

  • Two differential LVPECL/ECL bank outputs
  • Two differential LVPECL clock input pairs
  • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML, SSTL
  • Output frequency: 2GHz (maximum)
  • Translates any single-ended input signal to LVPECL levels with resistor bias on nPCLKx input
  • Bank skew: 60ps (maximum)
  • Part-to-part skew: 190ps (maximum)
  • Propagation delay: 460ps (maximum)
  • Additive phase jitter, RMS: 0.05ps (typical)
  • LVPECL mode operating voltage supply range: VCC = 2.375V to 3.8V, VEE = 0V
  • ECL mode operating voltage supply range: VCC = 0V, VEE = -3.8V to -2.375V
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
853S013AMILF Last Time Buy PSG20 SOIC 20 I Yes Tube
Availability
853S013AMILFT Last Time Buy PSG20 SOIC 20 I Yes Reel
Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
ICS853S013I Datasheet Datasheet PDF 815 KB
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 94 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
PCNs & PDNs
PDN# : CQ-18-03 Product Discontinuance Notice Product Discontinuation Notice PDF 218 KB
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1309-01 Changed of Traceability Mark Format Product Change Notice PDF 439 KB
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB
Other
Timing Solutions Products Overview Overview PDF 4.11 MB
RF Timing Family Product Overview Overview PDF 723 KB
IDT Products for Radio Applications 日本語 Product Brief PDF 2.34 MB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB
IDT Fanout Buffers Product Overview Product Brief PDF 739 KB
High-Performance, Low-Phase Noise Clocks Buffers product brief Product Brief PDF 378 KB

Software & Tools

Title Other Languages Type Format File Size Date
853S013I IBIS Model Model - IBIS ZIP 76 KB