LVDS Programmable Delay Line

The 8S89296 is a high-performance LVDS programmable delay line. The delay can vary from 2.2ns to 12.5ns in 10ps steps. The 8S89296 is characterized to operate from a 2.5V power supply and is guaranteed over industrial temperature range. The delay of the device varies in discrete steps based on a control word. A 10-bit long control word sets the delay in 10ps increments. Also, the input pins IN and nIN default to an equivalent low state when left floating. The control register can accept CMOS or TTL level signals.

Features

  • One LVDS level output
  • One differential clock input pair
  • Differential input clock (IN, nIN) can accept the following signaling levels: LVPECL, LVDS, CML
  • Maximum frequency: 800MHz
  • Programmable delay range: 2.2ns to 12.5ns in 10ps steps
  • D[10:0] can accept LVPECL, LVCMOS or LVTTL levels
  • Full 2.5V supply voltages
  • -40°C to +85°C ambient operating temperature
  • Lead-free (RoHS 6) package

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
8S89296NLGI Active NLG32P1 VFQFPN 32 I Yes Tray Availability
8S89296NLGI8 Active NLG32P1 VFQFPN 32 I Yes Reel Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
8S89296 Datasheet Datasheet PDF 347 KB Mar 2, 2017
Other
Timing Solutions Products Overview Overview PDF 964 KB Sep 19, 2018
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 24, 2016