2:1 PCIe GEN1/2/3 Clock Multiplexer

The 5V41068A is a 2:1 differential clock mux for PCI Express applications. It has very low additive jitter making it suitable for use in PCIe Gen2 and Gen3 systems. The 5V41068A selects between 1 of 2 differential HCSL inputs to drive a single differential HCSL output pair. The output can also be terminated to LVDS.

Features

  • 1 – 0.7V current mode differential HCSL output pair
  • Low additive jitter
  • suitable for use in PCIe Gen2 and Gen3 systems
  • 16-pin TSSOP package
  • small board footprint
  • Outputs can be terminated to LVDS
  • can drive a wider variety of devices
  • OE control pin
  • greater system power management
  • Industrial temperature range available
  • supports demanding embedded applications
  • Additive cycle-to-cycle jitter <5 ps
  • Additive phase jitter (PCIe Gen3) <0.2ps
  • Operating frequency up to 200MHz

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
5V41068APGG Active PGG16 TSSOP 16 C Yes Tube Availability
5V41068APGG8 Active PGG16 TSSOP 16 C Yes Reel Availability
5V41068APGGI Active PGG16 TSSOP 16 I Yes Tube Availability
5V41068APGGI8 Active PGG16 TSSOP 16 I Yes Reel Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
5V41068A Datasheet – Datasheet PDF 189 KB Apr 6, 2016
Application Notes & White Papers
AN-828 Termination - LVPECL – Application Note PDF 229 KB Jul 5, 2016
AN-844 Termination - AC Coupling Clock Receivers – Application Note PDF 82 KB May 12, 2014
AN-843 PCI Express Reference Clock Requirements – Application Note PDF 1.81 MB May 12, 2014
AN-842 Thermal Considerations in Package Design and Selection – Application Note PDF 403 KB May 11, 2014
AN-835 Differential Input with VCMR being VIH Referenced – Application Note PDF 77 KB May 10, 2014
AN-840 Jitter Specifications for Timing Signals – Application Note PDF 349 KB May 7, 2014
AN-834 Hot-Swap Recommendations – Application Note PDF 67 KB May 5, 2014
AN-836 Differential Input to Accept Single-ended Levels – Application Note PDF 37 KB May 5, 2014
AN-827 Application Relevance of Clock Jitter – Application Note PDF 1.06 MB Apr 23, 2014
AN-815 Understanding Jitter Units – Application Note PDF 476 KB Apr 23, 2014
AN-805 Recommended Ferrite Beads – Application Note PDF 38 KB Jan 14, 2014
PCNs & PDNs
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly – Product Change Notice PDF 611 KB Apr 13, 2016
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly – Product Change Notice PDF 611 KB Feb 14, 2016
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location – Product Change Notice PDF 596 KB Jan 27, 2016
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location – Product Change Notice PDF 544 KB Nov 12, 2015
PCN# : A1403-03 Gold wire to Copper wire – Product Change Notice PDF 42 KB Oct 14, 2014
PCN# : TB1403-01 Changed in Carrier Tape, Plastic Reel and Quantity per Reel on TSSOP-14, TSSOP-16 – Product Change Notice PDF 663 KB Apr 7, 2014
Other
Timing Solutions Products Overview – Overview PDF 964 KB Sep 19, 2018
PCI Express® Timing Solutions Overview – Overview PDF 301 KB Apr 19, 2018
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 24, 2016

Software & Tools

Title Other Languages Type Format File Size Date
5V41068A IBIS Model – Model - IBIS ZIP 6 KB Jan 16, 2014

News & Additional Resources

Date
Comparing and Contrasting PCIe and Ethernet Clock Jitter Specifications May 21, 2018
IDT Extends Leadership in Datacenter and Networking Systems with Launch of Its Latest PCI Express Timing Devices Apr 30, 2018
An Insider’s Guide to Finding the Right Timing Device for Your System Dec 18, 2017
Why Fanout Buffers Make More Sense Nov 28, 2017
Time for Performance Oct 11, 2017
IDT Surpasses Milestone of 3 Million Low-Power PCIe Gen3 Buffers Shipped Dec 18, 2014