12:2 Differential-to-LVPECL Clock Multiplexer

The 853S202I is a 12:2 Differential-to-LVPECL Clock Multiplexer which can operate up to 3GHz. The 853S202I has twelve select-able differential clock inputs, any of which can be independently rout-ed to either of the two LVDS outputs. The CLKx, nCLKx input pairs can accept LVPECL or LVDS levels. The fully differential architecture and low propagation delay make it ideal for use in clock distribution circuits.

Features

  • High speed 12.2 differential multiplexer
  • Two differential 3.3V or 2.5V LVPECL outputs
  • Maximum output frequency: 3GHz
  • Translates any single ended input signal to LVPECL levels with resistor bias on nCLKx input
  • Propagation delay: 1.15ns (maximum)
  • Input skew: 150ps (maximum)
  • Output skew: 50ps (maximum)
  • Part-to-part skew: 250ps (maximum)
  • Additive phase jitter, RMS: 0.114ps (typical) @ 155.52MHz, 3.3V
  • Full 3.3V or 2.5V operating supply mode
  • -40°C to 85°C ambient operating temperature
  • Lead-free (RoHS 6) packaging
  • Twelve selectable differential clock or data inputs
  • CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
853S202AYILF Active PRG48 TQFP 48 I Yes Tray Availability
853S202AYILFT Active PRG48 TQFP 48 I Yes Reel Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
853S202 Datasheet Datasheet PDF 623 KB Oct 3, 2016
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB May 10, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 23, 2014
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 12, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 11, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 7, 2014
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB May 5, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 5, 2014
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 94 KB May 5, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 23, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 14, 2014
PCNs & PDNs
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Apr 13, 2016
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Feb 14, 2016
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 95 KB Oct 21, 2015
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 50 KB Jul 20, 2015
Other
The IDT Consumer Products Advantage Overview PDF 4.01 MB Jun 30, 2017
The IDT Automotive Advantage Overview PDF 3.55 MB May 26, 2017
The IDT Communications Products Advantage Overview PDF 2.54 MB Feb 13, 2017
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 24, 2016

News & Additional Resources