3.3V CMOS Buffer/Clock Driver

The FCT3805 is a 3.3 volt, non-inverting clock driver built using advanced dual metal CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs and complies with the output specifications in this document. The FCT3805 offers low capacitance inputs with hysteresis. The FCT3805 is designed for high speed clock distribution where signal quality and skew are critical. The FCT3805 also allows single point-topoint transmission line driving in applications such as address distribution, where one signal must be distributed to multiple recievers with low skew and high signal quality. For more information on using the FCT3805 with two different input frequencies on bank A and B, please see AN-236.

Features

  • 0.5 MICRON CMOS Technology
  • Guaranteed low skew < 500ps (max.)
  • Very low duty cycle distortion < 1.0ns (max.)
  • Very low CMOS power levels
  • TTL compatible inputs and outputs
  • Inputs can be driven from 3.3V or 5V components
  • Two independent output banks with 3-state control
  • 1:5 fanout per bank
  • "Heartbeat" monitor output
  • VCC = 3.3V ± 0.3V
  • Available in SSOP, SOIC, and QSOP packages

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
49FCT3805APYG Active PYG20 SSOP 20 C Yes Tube Availability
49FCT3805APYGI Active PYG20 SSOP 20 I Yes Tube Availability
49FCT3805AQG Active PCG20 QSOP 20 C Yes Tube Availability
49FCT3805AQGI Active PCG20 QSOP 20 I Yes Tube Availability
49FCT3805ASOG Active PSG20 SOIC 20 C Yes Tube Availability
49FCT3805ASOGI Active PSG20 SOIC 20 I Yes Tube Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
49FCT3805 Datasheet Datasheet PDF 70 KB May 16, 2010
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 23, 2014
AN-845 Termination - LVCMOS Application Note PDF 62 KB May 12, 2014
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 12, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 11, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 7, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 5, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 23, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 14, 2014
PCNs & PDNs
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Apr 13, 2016
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Feb 14, 2016
PCN# : A1208-01R1 Gold to Copper Wire Product Change Notice PDF 254 KB Dec 20, 2012
Other
The IDT Consumer Products Advantage Overview PDF 4.01 MB Jun 30, 2017
The IDT Automotive Advantage Overview PDF 3.55 MB May 26, 2017
The IDT Communications Products Advantage Overview PDF 2.54 MB Feb 13, 2017
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 24, 2016

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