Low Skew,1-to-2 Differential-ToLVDS Fanout Buffer

The 85411I is a low skew, high performance 1-to-2 Differential-to-LVDS Fanout Buffer and a member of the family of High Performance Clock Solutions from IDT. The CLK, nCLK pair can accept most standard differential input levels.The 85411I is characterized to operate from a 3.3V power supply. Guaranteed output and part-to-part skew characteristics make the 85411I ideal for those clock distribution applications demanding well defined performance and repeatability.

Features

  • Two differential LVDS outputs
  • One differential CLK, nCLK clock input
  • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
  • Maximum output frequency: 650MHz
  • Translates any single ended input signal to LVDS levels with resistor bias on nCLK input
  • Output skew: 25ps (maximum)
  • Part-to-part skew: 300ps (maximum)
  • Additive phase jitter, RMS: 0.05ps (typical)
  • Propagation delay: 2.5ns (maximum)
  • 3.3V operating supply
  • -40°C to 85°C ambient operating temperature
  • Available in lead free (RoHS 6) package

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
85411AMILF Active DCG8 SOIC 8 I Yes Tube Availability
85411AMILFT Active DCG8 SOIC 8 I Yes Reel Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
85411I Datasheet Datasheet PDF 186 KB Jan 20, 2016
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB May 10, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 23, 2014
AN-846 Termination - LVDS Application Note PDF 50 KB May 12, 2014
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 12, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 11, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 7, 2014
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB May 5, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 5, 2014
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 94 KB May 5, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 23, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 14, 2014
PCNs & PDNs
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Apr 13, 2016
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Feb 14, 2016
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 95 KB Oct 21, 2015
PCN# : A1509-03 Gold to Copper wire Product Change Notice PDF 31 KB Oct 14, 2015
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 50 KB Jul 20, 2015
PDN# : N-12-22R2 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 363 KB Jun 13, 2013
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB Mar 23, 2013
PDN# : N-12-22R1 PRODUCT DISCONTINUANCE NOTICE Product Discontinuation Notice PDF 209 KB Feb 27, 2013
Other
The IDT Consumer Products Advantage Overview PDF 4.01 MB Jun 30, 2017
The IDT Automotive Advantage Overview PDF 3.55 MB May 26, 2017
The IDT Communications Products Advantage Overview PDF 2.54 MB Feb 13, 2017
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 24, 2016
IDT Fanout Buffers Product Overview Product Brief PDF 739 KB Feb 16, 2015
High-Performance, Low-Phase Noise Clocks Buffers product brief Product Brief PDF 378 KB Aug 13, 2012

News & Additional Resources