Low Additive Jitter 2:8 Buffer with CMOS / Differential Outputs

The 8P791208 is a low additive jitter 2:8 buffer with CMOS / differential outputs. The device takes 1 or 2 reference clocks, selects between them, using a pin selection and generates up to 8 outputs that are the same as the reference frequency. The 8P791208 supports two output banks, each with its own power supply. All outputs in one bank generate the same output frequency, but each output can be individually controlled for output type or output enable. The device can operate over the -40°C to 85°C temperature range.

Features

  • Accepts input frequencies ranging from 1PPS (1Hz) to 700MHz
  • Two differential inputs support LVPECL, LVDS, LVHSTL, HCSL or LVCMOS reference clocks
  • Generates 8 differential or 16 LVCMOS outputs
  • Outputs arranged in two banks of four outputs each
  • Select pins control which input drives which of two output banks
  • Controlled by 3-level input pins that are 3.3V-tolerant for all core voltages
  • Output type may be selected from LVPECL, LVDS or 2xLVCMOS
  • Each bank supports a separate power supply of 3.3V, 2.5V or
  • LVCMOS outputs are limited to 125MHz maximum and support swings of 3.3V, 2.5V, 1.8V and 1.5V
  • Individual output enables and output type selection supported
  • Output noise floor of –158dBc/Hz @ 156.25MHz
  • Core voltage supply of 3.3V, 2.5V or 1.8V
  • -40°C to +85°C ambient operating temperature
  • Lead-free (RoHS 6) QFN-32 (5 × 5 mm) packaging

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Carrier Type Buy Sample
8P791208NLGI Active NLG32P1 VFQFPN 32 I Tray Availability
8P791208NLGI8 Active NLG32P1 VFQFPN 32 I Reel Availability
8P791208NLGI/W Active NLG32P1 VFQFPN 32 I Reel Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
8P791208 Datasheet Datasheet PDF 895 KB Nov 5, 2017
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 23, 2014
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 12, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 11, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 7, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 5, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 23, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 14, 2014
Other
The IDT Communications Products Advantage Overview PDF 2.54 MB Feb 13, 2017
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Products for Radio Applications 日本語 Product Brief PDF 2.34 MB Nov 29, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 24, 2016

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