Programmable Low Additive Jitter 2:8 Buffer with Dividers and Universal Outputs

The device is intended to take 1 or 2 reference clocks, select between them, using a pin or register selection and generate up to 8 outputs that may be the same as the reference frequency or integer-divider versions of it.

The 8P79818 supports two output banks, each with its own divider and power supply. All outputs in one bank would generate the same output frequency, but each output can be individually controlled for output type, output enable or even powered-off.

The device supports a serial port for configuration of the parameters while in operation. The serial port can be selected to use the I2 C or SPI protocol. After power-up, all outputs will come up in LVDS mode and may be programmed to other configurations over the serial port. Outputs may be enabled or disabled under control of the OE input pin.

The device can operate over the -40°C to +85°C temperature range.

Features

  • Two differential inputs support LVPECL, LVDS, HCSL or LVCMOS reference clocks
  • Select which of the two input clocks is to be used as the reference clock for which divider via pin or register selection
  • Generates eight differential outputs or eight LVCMOS outputs, LVCMOS on Bank A only
  • Outputs arranged in 2 banks of 4 outputs each
  • Output enable control pin
  • Register programmable via I2C / SPI serial port
  • Core voltage supply of 3.3V, 2.5V or 1.8V
  • -40°C to +85°C ambient operating temperature
  • Lead-free (RoHS 6) packaging

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Carrier Type Buy Sample
8P79818NLGI Active NLG32P1 VFQFPN 32 I Tray Availability
8P79818NLGI8 Active NLG32P1 VFQFPN 32 I Reel Availability
8P79818NLGI/W Active NLG32P1 VFQFPN 32 I Reel Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
8P79818 Datasheet Datasheet PDF 863 KB Dec 18, 2016
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 23, 2014
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 12, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 11, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 7, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 5, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 23, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 14, 2014
Other
The IDT Consumer Products Advantage Overview PDF 4.01 MB Jun 30, 2017
The IDT Automotive Advantage Overview PDF 3.55 MB May 26, 2017
The IDT Communications Products Advantage Overview PDF 2.54 MB Feb 13, 2017
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 24, 2016

News & Additional Resources