Low Skew, 1-to-4 Differential-to-2.5V, 3.3V LVPECL/ECL Fanout Buffer

The IDT8T33FS314I is a low skew 1-to-4 Differential Fanout Buffer, designed with clock distribution in mind, accepting two clock sources into an input MUX. The MUX is controlled by a CLK_SEL pin. This makes the IDT8T33FS314I very versatile, in that, it can operate as both a differential clock buffer as well as a signal-level translator and fanout buffer.

The device is designed on a SiGe process and can operate at frequencies in excess of 2.7GHz. This ensures negligible jitter introduction to the timing budget which makes it an ideal choice for distributing high frequency, high precision clocks across back planes and boards in communication systems. Internal temperature compensation guarantees consistent performance across various platforms.

Features

  • Four differential ECL/LVPECL level outputs
  • One differential ECL/LVPECL or single-ended input (CLKA)
    One differential HSTL or single-ended input (CLKB)
  • Maximum output frequency: 2.7GHz
  • Additive phase jitter, RMS: 0.114ps (typical) @ 156.25MHz
  • Output skew: 50ps (maximum)
  • LVPECL and HSTL mode operating voltage supply range:
    VCC = 2.5V±5% or 3.3V±5%, VEE = 0V
  • ECL mode operating voltage supply range:
    VEE = -3.3V±5% or -2.5V±5%, VCC = 0V
  • -40°C to 85°C ambient operating temperature
  • Lead-free (RoHS 6) packaging

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
8T33FS314PGGI Active PGG20 TSSOP 20 I Yes Tube Availability
8T33FS314PGGI8 Active PGG20 TSSOP 20 I Yes Reel Availability
8T33FS314PYGI Active PYG20 SSOP 20 I Yes Tube Availability
8T33FS314PYGI8 Active PYG20 SSOP 20 I Yes Reel Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
8T33FS314I Data Sheet Datasheet PDF 631 KB Mar 18, 2014
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB May 10, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 23, 2014
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 12, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 11, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 7, 2014
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB May 5, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 5, 2014
AN-833 Differential Input Self Oscillation Prevention Application Note PDF 94 KB May 5, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 23, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 14, 2014
PCNs & PDNs
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Apr 13, 2016
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Feb 14, 2016
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB Jan 27, 2016
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB Nov 12, 2015
PCN# : TB1503-01R1 Carrier Tape Standardization for Selective Packages Product Change Notice PDF 333 KB Oct 21, 2015
PCN# : TB1503-01 Carrier Tape Standardization for Selective Packages Product Change Notice PDF 291 KB Jul 20, 2015
Other
The IDT Consumer Products Advantage Overview PDF 4.01 MB Jun 30, 2017
The IDT Automotive Advantage Overview PDF 3.55 MB May 26, 2017
The IDT Communications Products Advantage Overview PDF 2.54 MB Feb 13, 2017
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 24, 2016

News & Additional Resources