The 574 is a low jitter, low-skew, high performance PLL-based zero delay buffer for high speed applications. Based on IDT's proprietary low jitter Phase Locked Loop (PLL) techniques, the device provides four low skew outputs at speeds up to 160 MHz at 3.3 V. When one of the outputs is connected directly to FBIN, the rising edge of each output is aligned with the rising edge of the input clock. External delay elements connected in the feedback loops will cause the outputs to occur before the inputs by the amount of propagation delay of the external element.

Features

  • Packaged in 8 pin narrow SOIC, Pb (lead) free
  • Zero input-to-output delay
  • Four 1X outputs
  • Output to output skew is less than 150 ps
  • Output clocks up to 160 MHz at 3.3 V
  • External feedback path for output edge placement
  • Spread Smart™ technology works with spread spectrum clock generators
  • Full CMOS outputs with 18 mA output drive capability at TTL levels at 3.3 V
  • Advanced, low power, sub-micron CMOS process
  • Operating voltage from 3.0 to 5.5 V
  • Industrial temperature version available

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
574MILF Active DCG8 SOIC 8 I Yes Tube
Availability
574MILFT Active DCG8 SOIC 8 I Yes Reel
Availability
574MLF Active DCG8 SOIC 8 C Yes Tube
Availability
574MLFT Active DCG8 SOIC 8 C Yes Reel
Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
574 Datasheet Datasheet PDF 167 KB
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB
AN-845 Termination - LVCMOS Application Note PDF 62 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
System Applications and Design Guidelines with IDT’s Zero-Delay Buffers Application Note PDF 245 KB
PCNs & PDNs
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 95 KB
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 50 KB
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB
PCN# : A1208-01R1 Gold to Copper Wire Product Change Notice PDF 254 KB
PCN# A-0607-06 MMT Thailand as Alternate Assembly Facility for PLCC, SOIC 150mil/300mil Product Change Notice PDF 223 KB
Other
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB

Software & Tools

Title Other Languages Type Format File Size Date
574 3.3V IBIS Model Model - IBIS ZIP 3 KB