15.625MHZ TO 62.5MHZ, 1:4 LVCMOS/LVTTL Zero Delay Clock Buffer

The 86004 is a high performance 1:4 LVCMOS/LVTTL Clock Buffer. The 86004 has a fully integrated PLL and can be configured as zero delay buffer and has an input and output frequency range of 15.625MHz to 62.5MHz. The VCO operates at a frequency range of 250MHz to 500MHz. The external feedback allows the device to achieve "zero delay" between the input clock and the output clocks. The PLL_SEL pin can be used to bypass the PLL for system test and debug purposes. In bypass mode, the reference clock is routed around the PLL and into the internal output divider.


  • Four LVCMOS/LVTTL outputs, 7 Ohms typical output impedance
  • Single LVCMOS/LVTTL clock input
  • CLK accepts the following input levels: LVCMOS or LVTTL
  • Output frequency range: 15.625MHz to 62.5MHz
  • Input frequency range: 15.625MHz to 62.5MHz
  • VCO range: 250MHz to 500MHz
  • External feedback for "zero delay" clock regeneration with configurable frequencies
  • Fully integrated PLL
  • Cycle-to-cycle jitter: 65ps (maximum)
  • Output skew: 65ps (maximum)
  • Full 3.3V or 2.5V, or 3.3V core/2.5V output operating supply
  • 0°C to 70° ambient operating temperature
  • Available in lead-free RoHS compliant package

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
86004BGLF Obsolete PGG16 TSSOP 16 C Yes Tube Availability
86004BGLFT Obsolete PGG16 TSSOP 16 C Yes Reel Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
86004 Datasheet Datasheet PDF 213 KB Jul 9, 2015
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-845 Termination - LVCMOS Application Note PDF 62 KB May 12, 2014
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 12, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 11, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 7, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 5, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 23, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 23, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 14, 2014
Netcom LVCMOS Driver Termination Application Note PDF 147 KB Mar 15, 2006
Netcom LVCMOS Power Dissipation Application Note PDF 310 KB Mar 15, 2006
PDN# : CQ-16-04 QUARTER MARKET DECLINED PDN Product Discontinuation Notice PDF 560 KB Nov 2, 2016
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Apr 13, 2016
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Feb 14, 2016
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB Jan 27, 2016
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB Nov 12, 2015
PCN# L0607-02 Product Change Notice PDF 24 KB Aug 1, 2006
The IDT Communications Products Advantage Overview PDF 4.00 MB Mar 21, 2018
The IDT Consumer Products Advantage Overview PDF 4.01 MB Jun 30, 2017
The IDT Automotive Advantage 日本語 Overview PDF 3.55 MB May 26, 2017
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 24, 2016

Software & Tools

Title Other Languages Type Format File Size Date
86004 IBIS Model Model - IBIS ZIP 73 KB Jan 3, 2010