The 87604I is a 1:4 PCI/PCI-X Clock Generator. The 87604I has a selectable REF_IN or crystal input. The REF_IN input accepts LVCMOS or LVTTL input levels. The 87604I has a fully integrated PLL along with frequency configurable clock and feedback outputs for multiply-ing and regenerating clocks with "zero delay". The PLL's VCO has an operating range of 250MHz - 500MHz, allowing this device to be used in a variety of general purpose clocking applications. For PCI/PCI-X applications in particular, the VCO frequency should be set to 400MHz. This can be accomplished by supplying 33.33MHz, 25MHz, 20MHz, or 16.66MHz on the reference clock or crystal input and by selecting ÷12, ÷16, ÷20, or ÷24, respectively as the feedback divide value. The divider on the output bank can then be configured to generate 33.33MHz (÷12), 66.66MHz (÷6), 100MHz (÷4), or 133.33MHz (÷3). The 87604I is characterized to operate with its core supply at 3.3V and the bank supply at 3.3V or 2.5V. The 87604I is packaged in a small 6.1mm x 9.7mm TSSOP body, making it ideal for use in space-constrained applications.


  • Fully integrated PLL
  • Four LVCMOS/LVTTL outputs, 15? typical output impedance
  • Selectable crystal oscillator interface or LVCMOS/LVTTL REF_IN clock input
  • Maximum output frequency: 166.67MHz
  • Maximum crystal input frequency: 38MHz
  • Maximum REF_IN input frequency: 41.67MHz
  • Individual banks with selectable output dividers for generating 33.333MHz, 66.66MHz, 100MHz and 133.333MHz
  • Separate feedback control for generating PCI / PCI-X frequencies from a 16.66MHz or 20MHz crystal, or 25MHz or 33.33MHz reference frequency
  • VCO range: 250MHz to 500MHz
  • Cycle-to-cycle jitter: 120ps (maximum)
  • Period jitter, RMS: 20ps (maximum)
  • Output skew: 65ps (maximum)
  • Static phase offset: 160ps ± 160ps
  • Voltage Supply Modes: V DD /V DDA DDO 3.3/3.3/3.3 3.3/3.3/2.5
  • -40°C to 85°C ambient operating temperature
  • Available in both standard (RoHS 5 and lead-free (RoHS 6) packages

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
87604AGILF Active DQG28 TSSOP 28 I Yes Tube
87604AGILFT Active DQG28 TSSOP 28 I Yes Reel

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
87604I Datasheet Datasheet PDF 188 KB Nov 10, 2015
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-845 Termination - LVCMOS Application Note PDF 62 KB May 12, 2014
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 12, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 11, 2014
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB May 10, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 7, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 5, 2014
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB May 5, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 23, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 23, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 14, 2014
PCN# : A1503-02R1 Assembly Location Transfer from ATP to OSET Product Change Notice PDF 33 KB Sep 30, 2015
PCN# : A1503-02 Transfer Assembly Location Product Change Notice PDF 31 KB Apr 19, 2015
Timing Solutions Products Overview Overview PDF 4.11 MB Oct 31, 2018
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 24, 2016

Software & Tools

Title Other Languages Type Format File Size Date
87604I IBIS Model Model - IBIS ZIP 67 KB Nov 3, 2009