Multiplier And Zero Delay Buffer

The MK2302-01 is a high performance Zero Delay Buffer (ZDB) which integrates IDT's proprietary analog/digital Phase Locked Loop (PLL) techniques. The chip is part of IDT's ClockBlocksTM family and was designed as a performance upgrade to meet today's higher speed and lower voltage requirements. The zero delay feature means that the rising edge of the input clock aligns with the rising edges of both output clocks, giving the appearance of no delay through the device. There are two outputs on the chip, one being a low-skew divide by two of the other output. The MK2302-01 is ideal for synchronizing outputs in a large variety of systems, from personal computers to data communications to graphics/video. By allowing off-chip feedback paths, the device can eliminate the delay through other devices.


  • 8-pin SOIC package
  • Pb (lead) free package
  • Low input to output skew of 250 ps max
  • Absolute jitter ± 500 ps
  • Propagation Delay ± 350 ps
  • Ability to choose between different multipliers from 0.5X to 16X
  • Output clock frequency up to 168 MHz at 3.3 V
  • Can recover degraded input clock duty cycle
  • Output clock duty cycle of 45/55
  • Full CMOS clock swings with 25mA drive capability at TTL levels
  • Advanced, low power CMOS process
  • Operating voltage of 3.3 V or 5 V
  • Industrial temperature version available

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
MK2302S-01ILF Active DCG8 SOIC 8 I Yes Tube Availability
MK2302S-01LF Active DCG8 SOIC 8 C Yes Tube Availability
MK2302S-01ILFTR Active DCG8 SOIC 8 I Yes Reel Availability
MK2302S-01LFTR Active DCG8 SOIC 8 C Yes Reel Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
MK2302-01 Datasheet Datasheet PDF 188 KB May 16, 2010
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-845 Termination - LVCMOS Application Note PDF 62 KB May 12, 2014
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 12, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 11, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 7, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 5, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 23, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 23, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 14, 2014
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Apr 13, 2016
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Feb 14, 2016
The IDT Communications Products Advantage Overview PDF 4.00 MB Mar 21, 2018
The IDT Consumer Products Advantage Overview PDF 4.01 MB Jun 30, 2017
The IDT Automotive Advantage 日本語 Overview PDF 3.55 MB May 26, 2017
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 24, 2016