1:12 LVCMOS Dynamic Clock Switch/Generator

NOTICE - The following device(s) are recommended alternatives:

The 879893I is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two LVCMOS/LVTTL clock signals from which it generates 12 new LVCMOS/LVTTL clock outputs. External PLL feedback is used to also provide zero delay buffer performance. The 879893I Intelligent Dynamic Clock Switch (IDCS) circuit continuously monitors both input CLK signals. Upon detection of a failure (CLK stuck HIGH or LOW for at least 1 period), the nALARM for that CLK will be latched (LOW). If that CLK is the primary clock, the IDCS will switch to the good secondary clock and phase/frequency alignment will occur with minimal output phase disturbance.

Features

  • Twelve LVCMOS/LVTTL outputs (two banks of six outputs)
  • One QFB feedback clock output
  • Selectable CLK0 or CLK1 LVCMOS/LVTTL clock inputs
  • CLK0, CLK1 supports the following input types:
  • LVCMOS, LVTTL
  • Automatically detects clock failure
  • IDCS on-chip intelligent dynamic clock switch
  • Maximum output frequency: 200MHz
  • Output skew: 50ps (maximum), within bank
  • Cycle-to-cycle (FSEL3=0, VDD=3.3V±5%): 150ps (maximum)
  • Smooth output phase transition during clock fail-over switch
  • Full 3.3V or 2.5V supply modes
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
879893AYILF Obsolete PRG48 TQFP 48 I Yes Tray Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
879893 Datasheet Datasheet PDF 199 KB Jan 9, 2017
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB Jul 5, 2016
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 23, 2014
AN-831 The Crystal Load curve Application Note PDF 308 KB Sep 22, 2014
AN-845 Termination - LVCMOS Application Note PDF 62 KB May 12, 2014
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 12, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 11, 2014
AN-803 Crystal Timing Budget and Accuracy for IDT Timing Clock Products Application Note PDF 44 KB May 7, 2014
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB May 7, 2014
AN-839 RMS Phase Jitter Application Note PDF 149 KB May 6, 2014
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 32 KB May 6, 2014
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB May 5, 2014
AN-832 Timing Budget and Accuracy Application Note PDF 48 KB May 5, 2014
AN-830 Quartz Crystal Drive Level Application Note PDF 59 KB May 4, 2014
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 52 KB Mar 11, 2014
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB Apr 23, 2014
AN-806 Power Supply Noise Rejection Application Note PDF 353 KB Jan 14, 2014
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB Jan 14, 2014
AN-801 Crystal-High Drive Level Application Note PDF 109 KB Jan 14, 2014
PCNs & PDNs
PDN# : CQ-15-05 Market Declined Quarterly PDN Product Discontinuation Notice PDF 623 KB Oct 28, 2015
PCN# : A1402-02 Alternate Assembly Locations Product Change Notice PDF 34 KB Sep 27, 2014
Other
The IDT Consumer Products Advantage Overview PDF 4.01 MB Jun 30, 2017
The IDT Automotive Advantage Overview PDF 3.55 MB May 26, 2017
The IDT Communications Products Advantage Overview PDF 2.54 MB Feb 13, 2017
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Products for Radio Applications 日本語 Product Brief PDF 2.34 MB Nov 29, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 24, 2016

News & Additional Resources