The IDT840NT4-01I is clock generator designed to provide ethernet and USB clocks for Freescale B4/ T4-based systems. The IDT840NT4-01I utilizes IDT’s FemtoClock NG® PLL technology to synthesize eight low phase-jitter Ethernet reference clocks. The clock generator also provides a 24MHz USB reference clock and a 25MHz reference output.

Features

  • Ten LVCMOS clock outputs:
    Five LVCMOS 125MHz Ethernet outputs
    Three LVCMOS 25MHz /125MHz Ethernet outputs
    One LVCMOS 24MHz USB output
    One LVCMOS 25MHz REF output
  • QREF output; can be used to drive X1 of other devices, saving a crystal
  • Selectable crystal input, or differential LVPECL input; test mode
  • RMS Phase Jitter, 125MHz, integration range 12kHz - 20MHz: 0.75ps (typical)
  • Cycle-to-Cycle jitter: 75ps (typical)
  • Flexible voltage supply modes; supports legacy and future system requirements, minimizes power consumption
    Core voltage: (VDD, VDD_XTAL, VDDA)/
    Output voltage: (VDDO_A, VDDO_B, VDDO_C, VDDO_REF)
    Core / Output
    3.3V / 3.3V
    3.3V / 2.5V
    3.3V / 1.8V
    2.5V / 2.5V
    2.5V / 1.8V
  • -40°C to 85°C ambient operating temperature
  • Space-saving Pb-free, 48-pin 7x7mm QFN; minimal board space
  • Lead-free (RoHS 6) packaging

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
840NT4-01NLGI Active NLG48P1 VFQFPN 48 I Yes Tray
Availability

Buy / Quote
840NT4-01NLGI8 Active NLG48P1 VFQFPN 48 I Yes Reel
Availability
Buy / Quote

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
840NT4-01 Datasheet – Datasheet PDF 663 KB
Application Notes & White Papers
AN-828 Termination - LVPECL – Application Note PDF 229 KB
AN-831 The Crystal Load curve – Application Note PDF 308 KB
AN-845 Termination - LVCMOS – Application Note PDF 62 KB
AN-844 Termination - AC Coupling Clock Receivers – Application Note PDF 82 KB
AN-842 Thermal Considerations in Package Design and Selection – Application Note PDF 403 KB
AN-835 Differential Input with VCMR being VIH Referenced – Application Note PDF 77 KB
AN-803 Crystal Timing Budget and Accuracy for IDT Timing Clock Products – Application Note PDF 44 KB
AN-840 Jitter Specifications for Timing Signals – Application Note PDF 349 KB
AN-839 RMS Phase Jitter – Application Note PDF 149 KB
AN-838 Peak-to-Peak Jitter Calculations – Application Note PDF 32 KB
AN-834 Hot-Swap Recommendations – Application Note PDF 67 KB
AN-833 Differential Input Self Oscillation Prevention – Application Note PDF 94 KB
AN-837 Overdriving the Crystal Interface – Application Note PDF 50 KB
AN-836 Differential Input to Accept Single-ended Levels – Application Note PDF 37 KB
AN-832 Timing Budget and Accuracy – Application Note PDF 48 KB
AN-830 Quartz Crystal Drive Level – Application Note PDF 59 KB
AN-827 Application Relevance of Clock Jitter – Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units – Application Note PDF 476 KB
AN-802 Crystal-Measuring Oscillator Negative Resistance – Application Note PDF 52 KB
AN-805 Recommended Ferrite Beads – Application Note PDF 38 KB
AN-801 Crystal-High Drive Level – Application Note PDF 109 KB
AN-806 Power Supply Noise Rejection – Application Note PDF 353 KB
PCNs & PDNs
PCN# : W1308-01 Change of Passivation Thickness – Product Change Notice PDF 941 KB
Other
Timing Solutions Products Overview – Overview PDF 4.11 MB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB
info: For device-specific or order-specific documentation, submit a support request.

News & Additional Resources

Date
An Insider’s Guide to Finding the Right Timing Device for Your System Dec 18, 2017
Why Fanout Buffers Make More Sense Nov 28, 2017
Time for Performance Oct 11, 2017