The 8R45252I is a 3.3V,2.5V CML clock generator designed for Ethernet applications. The device synthesizes either a 50MHz, 62.5MHz, 100MHz, 125MHz, 156.25MHz, 250MHz or 312.5MHz clock signal with excellent phase jitter performance. The clock signal is distributed to two low-skew differential CML outputs. The device is suitable for driving the reference clocks of Ethernet PHYs. The device supports 3.3V and 2.5V voltage supply and is packaged in a small, lead-free (RoHS 6) 32-lead VFQFN package. The extended temperature range supports telecommunication, wireless infrastructure and networking end equipment requirements. The device is a member of the family of High Performance Clock Solutions from IDT.

Features

  • Clock generation of: 50MHz, 62.5MHz, 100MHz, 125MHz, 156.25MHz, 250MHz and 312.5MHz
  • Two differential CML clock output pairs
  • Crystal interface designed for 25MHz, 18pF parallel resonant crystal
  • RMS phase jitter @ 125MHz, using a 25MHz crystal (1.875MHz – 20MHz): 400fs (typical), 3.3V
    Offset                        Noise Power
      100Hz.................... -102.4 dBc/Hz
        1kHz.................... -119.4 dBc/Hz
      10kHz.................... -124.8 dBc/Hz
    100kHz.................... -125.7 dBc/Hz
  • LVCMOS interface levels for the control inputs
  • Full 3.3V and 2.5V supply voltage
  • Available in lead-free (RoHS 6) 32 VFQFN package
  • -40°C to 85°C ambient operating temperature

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
8R45252AKILF Last Time Buy NLG32P1 VFQFPN 32 I Yes Tray
Availability
8R45252AKILFT Last Time Buy NLG32P1 VFQFPN 32 I Yes Reel
Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
8R45252I Data Sheet Datasheet PDF 296 KB
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB
AN-831 The Crystal Load curve Application Note PDF 308 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB
AN-803 Crystal Timing Budget and Accuracy for IDT Timing Clock Products Application Note PDF 44 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-839 RMS Phase Jitter Application Note PDF 149 KB
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 32 KB
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB
AN-837 Overdriving the Crystal Interface Application Note PDF 50 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB
AN-832 Timing Budget and Accuracy Application Note PDF 48 KB
AN-830 Quartz Crystal Drive Level Application Note PDF 59 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 52 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
AN-801 Crystal-High Drive Level Application Note PDF 109 KB
AN-806 Power Supply Noise Rejection Application Note PDF 353 KB
PCNs & PDNs
PDN# : CQ-19-01 Quarterly Market Declined PDN Product Discontinuation Notice PDF 537 KB
PCN# : A1511-01(R1) Add SPEL India as Alternate Assembly Location Product Change Notice PDF 596 KB
PCN# : A1511-01 Add SPEL India as Alternate Assembly Location Product Change Notice PDF 544 KB
Other
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB