The 844N255I is a 6-output clock synthesizer designed for wireless infrastructure clock applications. The device uses IDT's fourth generation FemtoClock® NG technology for an optimum of high clock frequency and low phase noise performance, combined with a low power consumption and high power supply noise rejection. The reference frequency is selectable and the following frequency is supported: 25MHz. The synthesizer generates selectable 156.25MHz, 125MHz, 100MHz, 50MHz and 25MHz clock signals. The device is optimized for very low phase noise and cycle to cycle jitter. The synthesized clock frequency and the phase-noise performance are optimized for driving SRIO 1.3 and 2.0 SerDes reference, DSP and host-processor clocks. The device supports a 2.5V voltage supply and is packaged in a small, lead-free (RoHS 6) 48-lead VFQFN package. The extended temperature range supports wireless infrastructure, telecommunication and networking end equipment requirements.

Features

  • 4TH generation FemtoClock® NG technology
  • Selectable 156.25MHz, 125MHz, 100MHz, 50MHz and 25MHz output clock signals synthesized from a 25MHz reference frequency
  • Six differential LVDS clock outputs
  • Crystal interface designed for a 25MHz crystal
  • RMS phase jitter @ 156.25MHz, using a 25MHz crystal (1MHz - 20MHz): 0.27ps (typical)
  • Internal regulator for optimum noise rejection
  • LVCMOS interface levels for the frequency select and output enable inputs
  • Full 2.5V supply voltage
  • Lead-free (RoHS 6) 48-lead VFQFN package
  • -40°C to 85°C ambient operating temperature

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
844N255AKILF Last Time Buy NLG48P1 VFQFPN 48 I Yes Tray
Availability
844N255AKILFT Last Time Buy NLG48P1 VFQFPN 48 I Yes Reel
Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
ICS844N255I DATASHEET Datasheet PDF 691 KB
Application Notes & White Papers
AN-828 Termination - LVPECL Application Note PDF 229 KB
AN-831 The Crystal Load curve Application Note PDF 308 KB
AN-846 Termination - LVDS Application Note PDF 50 KB
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 77 KB
AN-803 Crystal Timing Budget and Accuracy for IDT Timing Clock Products Application Note PDF 44 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 349 KB
AN-839 RMS Phase Jitter Application Note PDF 149 KB
AN-838 Peak-to-Peak Jitter Calculations Application Note PDF 32 KB
AN-834 Hot-Swap Recommendations Application Note PDF 67 KB
AN-837 Overdriving the Crystal Interface Application Note PDF 50 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 37 KB
AN-832 Timing Budget and Accuracy Application Note PDF 48 KB
AN-830 Quartz Crystal Drive Level Application Note PDF 59 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.06 MB
AN-815 Understanding Jitter Units Application Note PDF 476 KB
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 52 KB
AN-805 Recommended Ferrite Beads Application Note PDF 38 KB
AN-801 Crystal-High Drive Level Application Note PDF 109 KB
AN-806 Power Supply Noise Rejection Application Note PDF 353 KB
PCNs & PDNs
PDN# : TP-19-06 Manufacturing Discontinuance Notice Product Discontinuation Notice PDF 1016 KB
PCN# : A1611-02 Add JCET China as Alternate Assembly and Change of Material Set at Alternate Assembly Location Product Change Notice PDF 583 KB
PCN# : A1403-03 Gold wire to Copper wire Product Change Notice PDF 42 KB
PCN# : W1308-01 Change of Passivation Thickness Product Change Notice PDF 941 KB
Other
Timing Solutions Products Overview Overview PDF 4.11 MB
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB