VersaClock® 6E Programmable Clock Generator

The 5P49V6965 is a member of IDT's VersaClock® 6E programmable clock generator family. The 5P49V6965 is intended for high-performance consumer, networking, industrial, computing, and data-communications applications. The reference clock can come from one of the two redundant clock inputs. A glitchless manual switchover function allows one of the redundant clocks to be selected during normal operation.
 
Configurations may be stored in on-chip One-Time Programmable (OTP) memory or changed using I²C interface.
 

Features

  • < 100mW core power (at 3.3V)
  • < 0.5ps RMS phase jitter (typical)
  • Meets PCIe® Gen1/2/3, USB 3.0, 1/10 GbE clock requirements
  • Supports both crystal (8MHz–40MHz) and external clock input(1MHz–350MHz)
  • 4 universal outputs pairs: LVPECL, LVDS, HCSL, or 8 LVCMOS outputs
  • 4 independent frequencies with 0.001MHz–350MHz output range
  • Reference output
  • 1.8V / 2.5V / 3.3V core and output voltages
  • 2 programmable I²C addresses allowing multiple devices to be used in same system.
  • Up to 4 different configuration sets in OTP non-volatile memory
  • Supported by IDT Timing Commander™  software tool
  • Quick sampling and customization process supported by online-form submission
  • 4 x 4 mm 24-VFQFPN package
  • -40°C to +85°C operating temperature range

Product Options

Choose from the options below, or use the Custom Part Configuration Utility.
Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
5P49V6965A000NLGI Active NLG24P2 VFQFPN 24 I Yes Tray Availability
5P49V6965A000NLGI8 Active NLG24P2 VFQFPN 24 I Yes Reel Availability

Product Comparison

5P49V6965 5P49V6967 5P49V6968 5P49V6975
Inputs (#) 2 2 2 1
Outputs (#) 5 9 11 5
Output Type HCSL, LVCMOS, LVDS, LVPECL HCSL, LP-HCSL, LVCMOS, LVDS, LVPECL HCSL, LP-HCSL, LVCMOS, LVDS, LVPECL HCSL, LVCMOS, LVDS, LVPECL
Phase Jitter Typ RMS (ps) 0.500 0.500 0.500 0.500

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
5P49V6965 Datasheet Datasheet PDF 435 KB Mar 15, 2018
IDT Products for Wired Broadband Applications Application Briefs PDF 686 KB Sep 1, 2017
User Guides & Manuals
VersaClock 6E Family Register Descriptions and Programming Guide Manual - User Reference PDF 794 KB Nov 6, 2017
Timing Commander Installation Guide Guide PDF 497 KB Oct 6, 2013
Application Notes & White Papers
AN-975 Cascading PLLs Application Note PDF 128 KB Aug 2, 2017
AN-970 Glitchless Frequency Adjustment using Fractional Output Divider Application Note PDF 588 KB May 11, 2017
AN-960 Layout and EMI Recommendations for Automotive Applications (short form) Application Note PDF 200 KB Mar 8, 2017
AN-954 Layout and EMI Recommendations for Automotive Applications Application Note PDF 271 KB Mar 8, 2017
AN-909 PCB Layout Considerations for Designing IDT VersaClock 3S, 5 and 6 Clock Products Application Note PDF 743 KB Jul 1, 2016
AN-918 Programmable Clocks vs Crystal Oscillators Application Note PDF 221 KB Mar 9, 2016
AN-905 Using VersaClock® 6 as Reference Clock for Xilinx® Series 7 FPGAs Application Note PDF 102 KB Oct 8, 2015
AN-846 Termination - LVDS Application Note PDF 50 KB May 12, 2014
AN-845 Termination - LVCMOS Application Note PDF 62 KB May 12, 2014
AN-844 Termination - AC Coupling Clock Receivers Application Note PDF 82 KB May 12, 2014
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 403 KB May 11, 2014
AN-815 Understanding Jitter Units Application Note PDF 476 KB Apr 23, 2014
AN-806 Power Supply Noise Rejection Application Note PDF 353 KB Jan 14, 2014
AN-808 PCI Express/HCSL Termination Application Note PDF 54 KB Jan 14, 2014
Other
The IDT Communications Products Advantage Overview PDF 4.00 MB Mar 21, 2018
VersaClock Family Overview 日本語 Overview PDF 180 KB Jan 9, 2018
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clocks for Xilinx Ultrascale FPGAs Technical Brief PDF 256 KB Apr 25, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 24, 2016
IDT Clocks for Altera's Stratix V and Arria V/X FPGAs Technical Brief PDF 238 KB Feb 7, 2016

Software & Tools

Title Other Languages Type Format File Size Date
Timing Commander Installer v1.10.1 Software ZIP 15.00 MB Mar 28, 2018
VersaClock 6E Timing Commander Personality File Software ZIP 5.00 MB Jan 9, 2018
5P49V6965 IBIS Model Model - IBIS ZIP 397 KB Nov 27, 2017

Evaluation Boards

Part Number Title Sort ascending
5P49V6965-EVK Evaluation Board for 5P49V6965 VersaClock® 6E