Multichannel DPLL / DCO - Four Channels

The 8A34042 Multichannel Digital PLL / Digitally Controlled Oscillator (DPLL/DCO) provides tools to manage timing references, clock conversion and timing paths for common communications protocols such as: Synchronous Ethernet (SyncE), Optical Transport Network (OTN) and Common Public Radio Interface (CPRI).  The device can be used to synchronize communication ports on line cards or daughter cards that are connected with synchronization sources across backplanes or other media. Digitally Controlled Oscillators (DCOs) are available to be controlled by OTN clock recovery servo software running on an external processor. Digital PLLs (DPLLs) support filtering of gapped clocks for OTN; and hitless reference switching between references from redundant timing sources. The device supports multiple independent timing channels for: clock generation; jitter attenuation and universal frequency translation.  Input-to-input, input-to-output and output-to-output phase skew can all be precisely managed.  The device outputs ultra-low-jitter clocks that can directly synchronize SERDES running at up to 28Gbps; as well as CPRI/OBSAI, SONET/SDH and PDH interfaces.


  • Four independent timing channels
  • Jitter output below 150fs RMS (typical)
  • Digital PLLs (DPLLs) lock to any frequency from 1kHz to 1GHz
  • DPLLs / Digitally Controlled Oscillators (DCOs) generate any frequency from 0.5Hz to 1GHz
  • DCO outputs can be aligned in phase and frequency with the outputs of any DPLL or DCO
  • Supports up to 8 differential; or 16 single-ended reference clock inputs
  • Supports up to 12 differential outputs; or 24 LVCMOS outputs
  • Reference monitors qualify/disqualify references depending on LOS, activity, frequency monitoring and/or LOS input pins
  • Automatic reference selection state machines select the active reference for each DPLL based on the reference monitors, priority tables, revertive / non-revertive and other programmable settings
  • Device requires a crystal oscillator or fundamental-mode crystal: 25MHz to 54MHz
  • Optional XO_DPLL input allows a wider range for XO, TCXO or OCXO frequencies from 1MHz to 150MHz for applications that require a local oscillator with high stability
  • Serial processor ports support 1MHz I2C or 50MHz SPI
  • The device can configure itself automatically after reset via:
    • Internal Customer-programmable One-Time Programmable memory 
    • Standard external I2C EPROM via separate I2C Master Port

Product Options

Orderable Part ID Part Status Pkg. Code Temp. Grade Carrier Type Buy Sample
8A34042B-000NLG Active NLG72P4 C Tray
8A34042B-000NLG8 Active NLG72P4 C Reel
8A34042B-000NLG# Active NLG72P4 C Reel

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
8A3xxxx Family Errata (Rev B with Update v4.7) Errata PDF 66 KB Dec 1, 2018
8A34042 Datasheet Datasheet PDF 1.24 MB Nov 19, 2018
User Guides & Manuals
8A3xxxx Family Programming Guide (v4.7) Guide PDF 3.31 MB Sep 24, 2018
Application Notes & White Papers
AN-1020 ClockMatrix on nCXO Redundancy Application Note PDF 530 KB Nov 5, 2018
AN-1010 ClockMatrix Time-to-Digital Converter Application Note PDF 1.54 MB Oct 16, 2018
ClockMatrix GUI Step-by-Step User Guide Application Note PDF 4.98 MB Oct 1, 2018
AN-950 82P338XX/9XX Usage of a SYNC Input for Clock Alignment Application Note PDF 175 KB Nov 20, 2016
AN-807 Recommended Crystal Oscillators for NetSynchro WAN PLL Application Note PDF 77 KB Oct 27, 2016
8A3x0xx Schematic Checklist (v1.16) Miscellaneous XLSX 287 KB Dec 3, 2018
Timing Solutions Products Overview Overview PDF 4.11 MB Oct 31, 2018
ClockMatrix 72-QFN (8 Output) Evaluation Board Schematic Schematic PDF 206 KB Oct 17, 2016
IDT Clock Generation Overview 日本語 Overview PDF 1.83 MB Apr 28, 2016
IDT Clock Distribution Overview 日本語 Overview PDF 3.79 MB Apr 24, 2016

Software & Tools

Title Other Languages Type Format File Size Date
Timing Commander Personality File for ClockMatrix 8A34001 (v6.0.1, FWv4.7.0) Software ZIP 12.11 MB Nov 13, 2018
EEPROM_Image_PR4.7_Part=24xx1025_Address=0x50-0x54 Software ZIP 177 KB Sep 24, 2018
EEPROM_Image_PR4.7_Part=24xx1024_Address=0x50-0x51 Software ZIP 177 KB Sep 24, 2018
ClockMatrix Register Header Files v4.7 Software ZIP 293 KB Sep 24, 2018
Timing Commander Installer v1.11.0.15609 Software ZIP 18.58 MB Sep 17, 2018
8A340x2 BSDL Model Model - BSDL BSDL 12 KB Jun 14, 2018
8A340xx Clock Matrix IBIS Model Model - IBIS ZIP 2.40 MB Mar 26, 2018