3.3 Volt Phase-Lock Loop Clock Driver

The 2510C is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the CLKIN signal with the CLKOUT signal. It is specifically designed for use with synchronous SDRAMs. The 2510C operates at 3.3V VCC and drives up to ten clock loads.

Features

  • Meets or exceeds PC133 registered DIMM specification1.1
  • Spread Spectrum Clock Compatible
  • Distributes one clock input to one bank of ten outputs
  • Operating frequency 25MHz to 175MHz
  • External feedback input (FBIN) terminal is used to synchrionize the outputs to the clock input
  • No external RC network required
  • Operates at 3.3V Vcc
  • Plastic 24-pin 173mil TSSOP package
     

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
2510CGLF Active PGG24 TSSOP 24 C Yes Tube Availability
2510CGLFT Active PGG24 TSSOP 24 C Yes Reel Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
2510C Datasheet Datasheet PDF 83 KB Sep 21, 2009
PCNs & PDNs
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Apr 13, 2016
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly Product Change Notice PDF 611 KB Feb 14, 2016
PCN# : TB1504-01R1 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 95 KB Oct 21, 2015
PCN# : TB1504-01 Qty per Reel Standardization for Selective Packages Product Change Notice PDF 50 KB Jul 20, 2015
PCN# : TB1303-02 Change of Tape & Reel Packing Method for Selective Products Product Change Notice PDF 361 KB Mar 23, 2013