5.0V 128K x 8 Asynchronous Static RAM Center Pwr & Gnd Pinout

The 71124 5V CMOS SRAM is organized as 128K x 8. The JEDEC centerpower/GND pinout reduces noise generation and improves system performance. All bidirectional inputs and outputs of the 71124 are TTL-compatible and operation is from a single 5V supply. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation.

Features

  • JEDEC revolutionary pinout (center power/GND) for reduced noise.
  • Equal access and cycle times – Commercial and Industrial: 12/15/20ns
  • One Chip Select plus one Output Enable pin
  • Bidirectional inputs and outputs directly TTL-compatible
  • Low power consumption via chip deselect
  • Available in a 32-pin 400 mil Plastic SOJ packages

Product Options

Orderable Part ID Part Status Pkg. Code Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
71124S12YG Active PBG32 SOJ 32 C Yes Tube Availability
71124S12YG8 Active PBG32 SOJ 32 C Yes Reel Availability
71124S15YG Active PBG32 SOJ 32 C Yes Tube Availability
71124S15YG8 Active PBG32 SOJ 32 C Yes Reel Availability
71124S15YGI Active PBG32 SOJ 32 I Yes Tube Availability
71124S15YGI8 Active PBG32 SOJ 32 I Yes Reel Availability
71124S20YG Active PBG32 SOJ 32 C Yes Tube Availability
71124S20YG8 Active PBG32 SOJ 32 C Yes Reel Availability
71124S20YGI Active PBG32 SOJ 32 I Yes Tube Availability
71124S20YGI8 Active PBG32 SOJ 32 I Yes Reel Availability

Technical Documentation

Title Other Languages Type Format File Size Date
Datasheets & Errata
71124 Data Sheet Datasheet PDF 78 KB Nov 3, 2014

Software & Tools

Title Other Languages Type Format File Size Date
71124 IBIS Model Model - IBIS ZIP 5 KB Dec 21, 1999