The 9FGV1004 is a member of IDT's PhiClock™ programmable clock generator family. The 9FGV1004 provides 1 copy each of 2 integer-related frequencies, 2 copies of a fractional or spread-spectrum frequency and 2 copies of the crystal reference input. Two select pins allow for hardware selection of the desired configuration, or two I²C bits all easy software selection of the desired configuration. The user may configure any one of the four OTP configurations as the default when operating in I²C mode. Four unique I²C addresses are available, allowing easy I²C access to multiple components.

Features

  • 4 programmable output pairs plus 2 LVCMOS REF outputs
  • 2 integer output frequencies and 1 fractional or spread-spectrum output frequency per configuration
  • 10MHz–325MHz output frequency (LVDS or LP-HCSL), integer configuration
  • 10MHz–200MHz output frequency (LVCMOS), integer configuration
  • 10MHz–156.25MHz output frequency, fractional or spread spectrum configuration
  • 1.8V to 3.3V core VDD and VDDREF
  • Individual 1.8V to 3.3V VDDO for each programmable output pair
  • Supports HCSL, LVDS and LVCMOS I/O standards
  • Supports LVPECL and CML logic with easy AC coupling – see AN-891 for alternate terminations
  • 320fs rms typical phase jitter outputs at 156.25MHz (12kHz–20MHz)
  • PCIe Gen 1–4 compliant
  • Supported by IDT Timing Commander™ software

Product Options

This device is factory-configurable. Try the Custom Part Configuration Utility.
注文可能な製品ID Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type パッケージ 購入/サンプル
9FGV1004B000NBGI Active VFQFPN 24 I はい Tray Package Info
Availability
9FGV1004B000NBGI8 Active VFQFPN 24 I はい Reel Package Info
Availability
9FGV1004BQ500LTGI Active LGA 24 I はい Tray Package Info
Availability
9FGV1004BQ500LTGI8 Active LGA 24 I はい Reel Package Info
Availability

Documentation & Downloads

タイトル 他の言語 Type 形式 サイズ 日付
データシート
9FGV1004Q Datasheet Datasheet PDF 178 KB
9FGV1004 Datasheet Datasheet PDF 298 KB
ユーザーガイド
9FGV100x Timing Commander User Guide Manual - Software PDF 1.55 MB
9FGV100x Register Descriptions and Programming Guide Manual - Software PDF 401 KB
アプリケーションノート、ホワイトペーパー
AN-1014 Microstrip vs Stripline: Crosstalk and RMS Phase Jitter Application Note PDF 486 KB
AN-1001 Combining PhiClock and 9ZXL1951D for PCIe Gen4/5 Application Note PDF 244 KB
AN-975 Cascading PLLs Application Note PDF 255 KB
AN-918 Programmable Clocks vs Crystal Oscillators Application Note PDF 307 KB
AN-891 Driving LVPECL, LVDS, CML, and SSTL Logic with IDT Universal Low-Power HCSL Outputs Application Note PDF 480 KB
AN-879 Low-Power HCSL vs Traditional HCSL Application Note PDF 235 KB
AN-843 PCI Express Reference Clock Requirements Application Note PDF 1.90 MB
AN-842 Thermal Considerations in Package Design and Selection Application Note PDF 495 KB
AN-840 Jitter Specifications for Timing Signals Application Note PDF 442 KB
AN-839 RMS Phase Jitter Application Note PDF 233 KB
AN-836 Differential Input to Accept Single-ended Levels Application Note PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced Application Note PDF 160 KB
AN-827 Application Relevance of Clock Jitter Application Note PDF 1.15 MB
AN-815 Understanding Jitter Units Application Note PDF 565 KB
AN-802 Crystal-Measuring Oscillator Negative Resistance Application Note PDF 136 KB
AN-805 Recommended Ferrite Beads Application Note PDF 121 KB
PCN / PDN
PCN# : A1904-01 Add Greatek, Taiwan as an Alternate Assembly Facility Product Change Notice PDF 983 KB
Downloads
9FGV1001, 9FGV1004, 9FGV1005 Timing Commander Personality File Software ZIP 3.90 MB
9FGV1004 IBIS Model Model - IBIS ZIP 98 KB
その他資料
PCI Express Timing Solutions Overview Overview PDF 275 KB
Timing Solutions Products Overview Overview PDF 4.11 MB
9FGV1004 Reference Schematic Schematic PDF 18 KB
IDT Products for Radio Applications (日本語) English Product Brief PDF 2.34 MB
IDT Products for Radio Applications (日本語) English Product Brief PDF 2.34 MB
IDT Clock Generation Overview (日本語) English Overview PDF 1.83 MB
IDT Clock Distribution Overview (日本語) English Overview PDF 3.79 MB
IDT Clock Generation Overview (日本語) English Overview PDF 1.83 MB
IDT Clock Distribution Overview (日本語) English Overview PDF 3.79 MB