NOTICE - The following device(s) are recommended alternatives:

The 813253 is a PLL based synchronous clock generator that is optimized for Gigabit Ethernet and PCI Express®™ clock jitter attenuation and frequency translation. The device contains two internal frequency multiplication stages that are cascaded in series. The first stage is a VCXO PLL that is optimized to provide reference clock jitter attenuation. The second stage is a FemtoClock® frequency multiplier that provides the low jitter, high frequency Gigabit Ethernet or PCI Express®™ output clock. Pre-divider and output divider multiplication ratios are selected using device selection control pins. The multiplication ratios are optimized to support most common clock rates used in Gigabit Ethernet and PCI Express® applications. The VCXO requires the use of an external, inexpensive pullable crystal. The VCXO uses external passive loop filter components which allows configuration of the PLL loop bandwidth and damping characteristics.


  • Three differential LVPECL output pairs
  • One differential input supports the following input types: LVPECL, LVDS, LVHSTL, HCSL
  • Accepts input frequencies from 19.6MHz to 136MHz, including: 25MHz, 62.5MHz, 100MHz and 125MHz input clocks
  • Attenuates the phase jitter of the input clock by using a low-cost fundamental mode VCXO crystal
  • Outputs common Gigabit Ethernet or PCI Express® clock rates
  • VCXO PLL bandwidth can be optimized for jitter attenuation and reference tracking using external loop filter connection
  • Absolute pull range: ±50ppm
  • FemtoClock frequency multiplier provides low jitter, high frequency output
  • FemtoClock VCO range: 490MHz - 680MHz
  • RMS phase jitter @ 156.25MHz, using a 25MHz crystal (1.875MHz – 20MHz): 0.421ps (typical)
  • Full 3.3V supply, or mixed 3.3V core 2.5V output supply
  • 0°C to 70°C ambient operating temperature
  • Available in lead-free (RoHS 6) package


下单器件 ID Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Obsolete TSSOP 24 C 是的 Tube
Obsolete TSSOP 24 C 是的 Reel


文档标题 其他语言 类型 文档格式 文件大小 日期
应用指南 &白皮书
AN-828 Termination - LVPECL 应用文档 PDF 322 KB
AN-831 The Crystal Load curve 应用文档 PDF 395 KB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-838 Peak-to-Peak Jitter Calculations 应用文档 PDF 115 KB
AN-839 RMS Phase Jitter 应用文档 PDF 233 KB
AN-836 Differential Input to Accept Single-ended Levels 应用文档 PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced 应用文档 PDF 160 KB
AN-830 Quartz Crystal Drive Level 应用文档 PDF 143 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-802 Crystal-Measuring Oscillator Negative Resistance 应用文档 PDF 136 KB
AN-801 Crystal-High Drive Level 应用文档 PDF 202 KB
AN-806 Power Supply Noise Rejection 应用文档 PDF 438 KB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
PDN# : CQ-14-03 Quarter PDN for Declined Market 产品停产通告 PDF 539 KB