NOTICE - The following device(s) are recommended alternatives:

The MPC9448 is specifically designed to distribute LVCMOS compatible clock signals up to a frequency of 350 MHz. Each output provides a precise copy of the input signal with a near zero skew. The outputs buffers support driving of 50Ω terminated transmission lines on the incident edge. Each output is capable of driving either one parallel terminated or two series terminated transmission lines. Two selectable, independent clock inputs are available, providing support of LVCMOS and differential LVPECL clock distribution systems. The MPC9448 CLK_STOP control is synchronous to the falling edge of the input clock. It allows the start and stop of the output clock signal only in a logic low state, thus eliminating potential output runt pulses. Applying the OE control will force the outputs into high-impedance mode. All inputs have an internal pull-up or pull-down resistor preventing unused and open inputs from floating. The device supports a 2.5 V or 3.3 V power supply and an ambient temperature range of -40°C to +85°C. The MPC9448 is pin and function compatible but performance-enhanced to the MPC948.

特性

  • 12 LVCMOS compatible clock outputs
  • Selectable LVCMOS and differential LVPECL compatible clock inputs
  • Maximum clock frequency of 350 MHz
  • Maximum clock skew of 150 ps
  • Synchronous output stop in logic low state eliminates output runt pulses
  • High-impedance output control
  • 3.3 V or 2.5 V power supply
  • Drives up to 24 series terminated clock lines
  • Ambient temperature range -40°C to +85°C
  • 32-Lead LQFP packaging
  • 32-lead Pb-free package available
  • Supports clock distribution in networking, telecommunication and computing applications
  • Pin and function compatible to MPC948

产品选择

下单器件 ID Part Status Pkg. Type Lead Count (#) Temp. Grade Pb (Lead) Free Carrier Type Buy Sample
Obsolete TQFP 32 C 是的 Tray
Availability
Obsolete TQFP 32 C 是的 Reel
Availability

文档和下载

文档标题 其他语言 类型 文档格式 文件大小 日期
数据手册与勘误表
MPC9448 Datasheet 数据手册 PDF 285 KB
应用指南 &白皮书
AN-828 Termination - LVPECL 应用文档 PDF 322 KB
AN-845 Termination - LVCMOS 应用文档 PDF 146 KB
AN-844 Termination - AC Coupling Clock Receivers 应用文档 PDF 170 KB
AN-842 Thermal Considerations in Package Design and Selection 应用文档 PDF 495 KB
AN-840 Jitter Specifications for Timing Signals 应用文档 PDF 442 KB
AN-833 Differential Input Self Oscillation Prevention 应用文档 PDF 180 KB
AN-834 Hot-Swap Recommendations 应用文档 PDF 153 KB
AN-836 Differential Input to Accept Single-ended Levels 应用文档 PDF 120 KB
AN-835 Differential Input with VCMR being VIH Referenced 应用文档 PDF 160 KB
AN-827 Application Relevance of Clock Jitter 应用文档 PDF 1.15 MB
AN-815 Understanding Jitter Units 应用文档 PDF 565 KB
AN-805 Recommended Ferrite Beads 应用文档 PDF 121 KB
PCN / PDN
PCN# : A1602-01(R1) Add Greatek Taiwan as Alternate Assembly 产品变更通告 PDF 611 KB
PDN#: N-16-02 PRODUCT DISCONTINUANCE NOTICE ON SELECT DEVICES 产品停产通告 PDF 161 KB
PCN# : A1602-01 Add Greatek Taiwan as Alternate Assembly 产品变更通告 PDF 611 KB
PCN# : A1401-02 Alternate Copper Wire Assembly Site 产品变更通告 PDF 36 KB
PDN# : N-12-48R2 PRODUCT DISCONTINUANCE NOTICE 产品停产通告 PDF 138 KB
PDN# : N-12-22R2 PRODUCT DISCONTINUANCE NOTICE 产品停产通告 PDF 363 KB
PDN# : N-12-22R1 PRODUCT DISCONTINUANCE NOTICE 产品停产通告 PDF 209 KB
PDN# : N-12-48 PRODUCT DISCONTINUANCE NOTICE 产品停产通告 PDF 93 KB
PCN# : A-0610-02 ASAT China as Alternate Facility for CABGA/CVBGA/FPBGA/TQFP/PQFP 产品变更通告 PDF 252 KB
Downloads
MPC9448 IBIS Model 模型 - IBIS ZIP 16 KB
其他
Timing Solutions Products Overview 概览 PDF 4.11 MB
IDT Clock Generation Overview 日本語 概览 PDF 1.83 MB
IDT Clock Distribution Overview 日本語 概览 PDF 3.79 MB