Is the 871S1022 part PCI Express Gen3 compliant when we bypass the PLL clock?

In general, whether a clock buffer IC will pass PCI Express Clock standard or not, really depends on how clean the input clock is and what is the additive jitter.

If the cleanest clock input is provided, the 871S1022 will definitely pass the Gen3 compliance. This does NOT guarantee that it will pass the PCIe clock Gen 3 specifications in a customer’s application. The most important thing is to make sure that the input clock is as clean as possible.

Secondly, the additive jitter added by the 871S1022 part shouldn't be a problem. Since it will be 500 fs of additive jitter spread evenly across the spectrum of interest, it will pass Gen 3 specifications as long as the source is compliant.