How to adjust the Fractional Output Divider Frequency of IDT's Universal Frequency Translator (UFT3G) devices

The 8T49N28X UFT devices have two-stage fractional output dividers. For the Fractional N (FracN) output dividers, the output divide ratio is given by:
Output Divide Ratio = (N.F)x2
where:
N = Integer Part: 4, 5, ...(218-1)
F = Fractional Part: [0, 1, 2, ...(228-1)]/(228)
The output frequency is given by:
foutput=fvco/((N.F)x2)
For integer operation of these outputs dividers, N = 3 is also supported.
 
The relevant register settings are given by the following two formulas:
N_Qx= Integer portion of the Output Divide Ratio
NFRAC_Qx = round(F*2^28)
 
In the following example, a 156.25MHz output and 10ppm offset will be used.
1) Setup 8T49N28X to generate a 156.26MHz output on a fractional output divider, derived from a VCO running at 3750MHz. The output divider is 24.
24=(N.F)*2 → N=12, F=0
 
2) Use the target ppm offset to calculate the required Noffset value using the following formula.
PPM_offset= (N0ppm-Noffset)/N0ppm *1e6
Noffset= N0ppm -(PPM_Offset/1e6* N0ppm)
where:
Noffset = New N divider for ppm offset
N0ppm = 0ppm offset divider
 
For the example:
N0ppm=24
Noffset= 24 -(10/1e6* 24)= 23.99976
 
Next, decompose the effective output divider into the corresponding register settings:
Noffset =(N.F)x2= 23.99976
N_Qx= 11, F= 0.99988
NFRAC_Qx = round(F*2^28)= 268403244
 
Update the complete N_Qx and NFRAC_Qx register range using an I2C block write.
When measuring the frequency update, trigger the measurement equipment off the rising edge of the I2C write “STOP” bit.
 
Refer to application note AN-870 for more details. For other questions not addressed by the knowledge base, please submit a technical support request.

Documents

Title Other Languages Type Format File Size Date
Application Notes & White Papers
AN-870 UFT3G Frequency Tuning Application Note PDF 835 KB Nov 5, 2014