How to calculate the maximum overall timing error for an IDT timing device

Choose the appropriate crystal. For the example below, we are targeting 50ppm accuracy for the system. Figure 1 shows an example of a crystal electrical specification. Most manufacturers have similar values and variables.
 
 
 
Frequency Tolerance = ± 15ppm
Frequency Stability = ± 15ppm
Aging = ± 10ppm total for 10 years.
 
The accuracy of the oscillator across temperature, voltage and process is ±3.5ppm. This is assuming a trim sensitivity of 7ppm/pF, a 10% process shift and 5pF of internal load capacitance (CL).
The load capacitance accuracy, which will include board and pin parasitics, is equal to ±0.5ppm. This is assuming a trim sensitivity of 7ppm/pF, minimal PCB process shift, 1% tolerance load capacitors and external load capacitance of 7pF. The 5pF internal and 7pF external load capacitance will fulfill the required 12pF load capacitance to properly tune the crystal. The sum of all the parameters is the total system timing error.
Maximum overall timing error = 15 + 15 + 10 + 3.5 + 0.5 = 44ppm