How to calculate the output dividers for devices in the 3rd generation Universal Frequency Translator family (8T49N28X)

Use the following example for the calculations:
Jitter Attenuator Example
• Input CLK0 frequency: 25MHz
• Output Frequency: 125MHz (integer output divider)
• Output 2 Frequency: 155.52MHz (fractional output divider)
• Crystal frequency: 38.88MHz
• Crystal Doubler: Enabled
In this example, both the 125MHz and 155.52MHz output frequencies will be derived from the same VCO. The 125MHz output will be derived using an integer divider and 155.52MHz will be derived using a fractional divider. The VCO is first calculated using the integer divider path, then the fractional divider is calculated based on that VCO frequency. The integer output divider has two stages, NS1 and NS2. The total divide ratio is NS1*NS2. The valid settings for NS1 and NS2 are:
NS1=÷4, ÷5, or ÷6 (/1 option cannot be used when driving NS1 from the VCO)
NS2=÷1, ÷2, ÷2*n for n=2 to 2^16
Below is a tabular representation of the NS1 and NS2 settings. The output frequency is related to the VCO frequency as follows:
Fout=Fvco/N
where
Fout= Output frequency
Fvco= VCO frequency
N= NS1*NS2
Refer to application note AN-860 for more details. For other questions not addressed by the Knowledge Base, please submit a technical support request.
 

Documents

Title Other Languages Type Format File Size Date
Application Notes & White Papers
AN-860 8T49N28X Frequency Programming Guide Application Note PDF 214 KB Jun 4, 2014