IDT offers a number of SETS (Synchronization Equipment Timing Source), jitter attenuation and buffer timing solutions used within the synchronization network equipment. IDT8T49N285/6/7 is a 3rd generation universal frequency translator timing device (UFT3G) with reduced jitter. It is ideal in any frequency translation application, including 1G, 10G and 100G synchronous Ethernet, ONT and SONET/SDH frequencies. IDT82P33810 is a Synchronization Management Unit (SMU) that provides features to manage timing references, clock sources and timing paths for IEEE 1588 and Synchronous Ethernet (SyncE) based clocks.
IDT Timing Commander software is used to configure the devices used in the test to generate clocks for measurements. Some key configuration parameters are tabulated in Table 1 below. The general test setup is illustrated in Figure 1 below in which 8T49N286 uses a 40MHz crystal and is configured to lock to a 25MHz clock from 82P33810, while 82P33810 gets its reference clock from Anue 3500, the network emulator test equipment from IXIA.
Refer to application note AN-871 for more details. For other questions not addressed by this knowledge base, please submit a technical support request.