What are IBIS, HSPICE, Verilog, and VHDL Models for SRAM devices?

HSPICE and IBIS are both used for signal integrity simulations on a board design. They are used to minimize noise on a board as much as possible.

These models provide information such as V/I curves, the rise and fall time, derating curve information, and package parasitics. They do not provide information on how the particular device functionally works. For that you need Verilog and VHDL.

A family of device options from the same design, for instance all of the 71V256 would have the same HSPICE model because the I/O structures are the same. 5V and 3.3V devices have different HSPICE and IBIS models (even if they are options from the same design) because there are process differences between 5V and 3.3V devices.

The IBIS models are specific to a particular option and package. This is because the IBIS model refers to the particular pinout, and takes into account the package parasitics. This means that a BGA would be different from a TQFP. The IBIS models are generated with a 50 Ohm load (as required by the IBIS forum). On the other hand, the HSPICE models make no reference to the package or the pinout, therefore a HSPICE model would be the same for all options and packages of the same voltage level of a particular design. Also, HSPICE models are not generated with specific loads.

Verilog and VHDL are known as Hardware Description Languages. Models created in these languages are known as Behavioral Models. Verilog and VHDL are two different languages used for the same purpose, much like C and Pascal. The syntax is very different; therefore you have to make sure which style is needed before using a particular model. The languages are used to model the functionality of a particular device. This means they basically describe the datasheet waveforms and the block diagram. They do not make any reference to the DC power levels, therefore the 3.3V and 5V devices have the same Verilog and VHDL models. Using Verilog and VHDL a customer can enter a certain set of inputs and then see what outputs the model says the device will provide.